Mesa (staging/20.1): radv: Extend tiling flags to 64-bit.

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Module: Mesa
Branch: staging/20.1
Commit: ec918aa04c2b294063afed6f63f8dec462dd4ff2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec918aa04c2b294063afed6f63f8dec462dd4ff2

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Sat May  2 13:59:59 2020 +0200

radv: Extend tiling flags to 64-bit.

SCANOUT is bit 63 ....

Fixes: bfd9e7ff243 "radv: Use new scanout gfx9 metadata flag."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2879
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4859>
(cherry picked from commit df9629e593ee7faee617e90b644b52f049801e34)

---

 .pick_status.json                             | 2 +-
 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 9e3e8426526..11ffdbfcfe1 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -112,7 +112,7 @@
         "description": "radv: Extend tiling flags to 64-bit.",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "bfd9e7ff243a48873721fd57d9a159cc82f580d6"
     },
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
index f6f9080d8e4..740d7d23fa6 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
@@ -717,7 +717,7 @@ radv_amdgpu_winsys_bo_set_metadata(struct radeon_winsys_bo *_bo,
 {
 	struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo);
 	struct amdgpu_bo_metadata metadata = {0};
-	uint32_t tiling_flags = 0;
+	uint64_t tiling_flags = 0;
 
 	if (bo->ws->info.chip_class >= GFX9) {
 		tiling_flags |= AMDGPU_TILING_SET(SWIZZLE_MODE, md->u.gfx9.swizzle_mode);