Mesa (master): freedreno/fdl: Align after dividing by block size

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: a34b3fa198a4f87f8e07c718ec2f2e07927c6d7d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a34b3fa198a4f87f8e07c718ec2f2e07927c6d7d

Author: Kristian H. Kristensen <hoegsberg at google.com>
Date:   Tue May  5 00:03:18 2020 -0700

freedreno/fdl: Align after dividing by block size

For compressed formats, we need to align the number of blocks, not the
logical number of pixels in the texture.  Only compressed formats have
block width/height > 1, so we can just unconditionally multiply the
alignment by the block width/height.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4868>

---

 src/freedreno/fdl/fd6_layout.c | 22 +++++++++-------------
 1 file changed, 9 insertions(+), 13 deletions(-)

diff --git a/src/freedreno/fdl/fd6_layout.c b/src/freedreno/fdl/fd6_layout.c
index 033b5c33f99..c3217e2f1fe 100644
--- a/src/freedreno/fdl/fd6_layout.c
+++ b/src/freedreno/fdl/fd6_layout.c
@@ -66,14 +66,10 @@ static const struct {
 static int
 fdl6_pitchalign(struct fdl_layout *layout, int ta, int level)
 {
-	const struct util_format_description *format_desc =
-		util_format_description(layout->format);
-
 	uint32_t pitchalign = 64;
 	if (fdl_tile_mode(layout, level))
 		pitchalign = tile_alignment[ta].pitchalign;
-	if (format_desc->layout == UTIL_FORMAT_LAYOUT_ASTC)
-		pitchalign *= util_format_get_blockwidth(layout->format);
+
 	return pitchalign;
 }
 
@@ -142,8 +138,9 @@ fdl6_layout(struct fdl_layout *layout,
 			height = u_minify(height0, level);
 		}
 
+		uint32_t nblocksy = util_format_get_nblocksy(format, height);
 		if (tile_mode)
-			height = align(height, tile_alignment[ta].heightalign);
+			nblocksy = align(nblocksy, tile_alignment[ta].heightalign);
 
 		/* The blits used for mem<->gmem work at a granularity of
 		 * 32x32, which can cause faults due to over-fetch on the
@@ -153,17 +150,16 @@ fdl6_layout(struct fdl_layout *layout,
 		 * may not be:
 		 */
 		if (level == mip_levels - 1)
-			height = align(height, 32);
+			nblocksy = align(nblocksy, 32);
 
-		uint32_t pitch_pixels = util_align_npot(u_minify(pitch0, level),
-				fdl6_pitchalign(layout, ta, level));
+		uint32_t nblocksx =
+			util_align_npot(util_format_get_nblocksx(format, u_minify(pitch0, level)),
+					fdl6_pitchalign(layout, ta, level));
 
 		slice->offset = layout->size;
-		uint32_t blocks = util_format_get_nblocks(format,
-				pitch_pixels, height);
+		uint32_t blocks = nblocksx * nblocksy;
 
-		slice->pitch = util_format_get_nblocksx(format, pitch_pixels) *
-			layout->cpp;
+		slice->pitch = nblocksx * layout->cpp;
 
 		/* 1d array and 2d array textures must all have the same layer size
 		 * for each miplevel on a6xx. 3d textures can have different layer