Mesa (master): freedreno: Drop the "write" arg to emit_const_bo now relocs don't care.
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gitlab-mirror at kemper.freedesktop.org
Tue May 12 16:58:52 UTC 2020
Module: Mesa
Branch: master
Commit: 0f2e44d55b01b3637fb96ce18840b8ab9250d508
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f2e44d55b01b3637fb96ce18840b8ab9250d508
Author: Eric Anholt <eric at anholt.net>
Date: Mon May 11 09:46:03 2020 -0700
freedreno: Drop the "write" arg to emit_const_bo now relocs don't care.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
---
src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 12 ++++--------
src/gallium/drivers/freedreno/a4xx/fd4_emit.c | 12 ++++--------
src/gallium/drivers/freedreno/a5xx/fd5_emit.c | 12 ++++--------
src/gallium/drivers/freedreno/a6xx/fd6_const.c | 12 ++++--------
src/gallium/drivers/freedreno/ir3/ir3_const.h | 6 +++---
5 files changed, 19 insertions(+), 35 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 3a693046f12..acb09f58e0d 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -93,7 +93,7 @@ fd3_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
}
static void
-fd3_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean write,
+fd3_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type,
uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
uint32_t anum = align(num, 4);
@@ -111,11 +111,7 @@ fd3_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean writ
for (i = 0; i < num; i++) {
if (prscs[i]) {
- if (write) {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- } else {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- }
+ OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
} else {
OUT_RING(ring, 0xbad00000 | (i << 16));
}
@@ -145,12 +141,12 @@ emit_const(struct fd_ringbuffer *ring,
static void
emit_const_bo(struct fd_ringbuffer *ring,
- const struct ir3_shader_variant *v, bool write, uint32_t dst_offset,
+ const struct ir3_shader_variant *v, uint32_t dst_offset,
uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
/* TODO inline this */
assert(dst_offset + num < v->constlen * 4);
- fd3_emit_const_bo(ring, v->type, write, dst_offset, num, prscs, offsets);
+ fd3_emit_const_bo(ring, v->type, dst_offset, num, prscs, offsets);
}
#define VERT_TEX_OFF 0
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index f93fb3f7381..ff5a6a31271 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -88,7 +88,7 @@ fd4_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
}
static void
-fd4_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean write,
+fd4_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type,
uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
uint32_t anum = align(num, 4);
@@ -106,11 +106,7 @@ fd4_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean writ
for (i = 0; i < num; i++) {
if (prscs[i]) {
- if (write) {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- } else {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- }
+ OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
} else {
OUT_RING(ring, 0xbad00000 | (i << 16));
}
@@ -140,12 +136,12 @@ emit_const(struct fd_ringbuffer *ring,
static void
emit_const_bo(struct fd_ringbuffer *ring,
- const struct ir3_shader_variant *v, bool write, uint32_t dst_offset,
+ const struct ir3_shader_variant *v, uint32_t dst_offset,
uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
/* TODO inline this */
assert(dst_offset + num < v->constlen * 4);
- fd4_emit_const_bo(ring, v->type, write, dst_offset, num, prscs, offsets);
+ fd4_emit_const_bo(ring, v->type, dst_offset, num, prscs, offsets);
}
static void
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index 508676ba4ec..570eb7dc1d8 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -92,7 +92,7 @@ fd5_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
}
static void
-fd5_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean write,
+fd5_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type,
uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
uint32_t anum = align(num, 2);
@@ -111,11 +111,7 @@ fd5_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean writ
for (i = 0; i < num; i++) {
if (prscs[i]) {
- if (write) {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- } else {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- }
+ OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
} else {
OUT_RING(ring, 0xbad00000 | (i << 16));
OUT_RING(ring, 0xbad00000 | (i << 16));
@@ -148,12 +144,12 @@ emit_const(struct fd_ringbuffer *ring,
static void
emit_const_bo(struct fd_ringbuffer *ring,
- const struct ir3_shader_variant *v, bool write, uint32_t dst_offset,
+ const struct ir3_shader_variant *v, uint32_t dst_offset,
uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
/* TODO inline this */
assert(dst_offset + num < v->constlen * 4);
- fd5_emit_const_bo(ring, v->type, write, dst_offset, num, prscs, offsets);
+ fd5_emit_const_bo(ring, v->type, dst_offset, num, prscs, offsets);
}
void
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_const.c b/src/gallium/drivers/freedreno/a6xx/fd6_const.c
index 45165b969e1..86ea1d1e41c 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_const.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_const.c
@@ -105,7 +105,7 @@ fd6_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
}
static void
-fd6_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean write,
+fd6_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type,
uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
uint32_t anum = align(num, 2);
@@ -124,11 +124,7 @@ fd6_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean writ
for (i = 0; i < num; i++) {
if (prscs[i]) {
- if (write) {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- } else {
- OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
- }
+ OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0);
} else {
OUT_RING(ring, 0xbad00000 | (i << 16));
OUT_RING(ring, 0xbad00000 | (i << 16));
@@ -161,12 +157,12 @@ emit_const(struct fd_ringbuffer *ring,
static void
emit_const_bo(struct fd_ringbuffer *ring,
- const struct ir3_shader_variant *v, bool write, uint32_t dst_offset,
+ const struct ir3_shader_variant *v, uint32_t dst_offset,
uint32_t num, struct pipe_resource **prscs, uint32_t *offsets)
{
/* TODO inline this */
assert(dst_offset + num < v->constlen * 4);
- fd6_emit_const_bo(ring, v->type, write, dst_offset, num, prscs, offsets);
+ fd6_emit_const_bo(ring, v->type, dst_offset, num, prscs, offsets);
}
static void
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_const.h b/src/gallium/drivers/freedreno/ir3/ir3_const.h
index 1112d626d0f..157bc273bde 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_const.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_const.h
@@ -45,7 +45,7 @@ static void emit_const(struct fd_ringbuffer *ring,
const void *user_buffer, struct pipe_resource *buffer);
static void emit_const_bo(struct fd_ringbuffer *ring,
- const struct ir3_shader_variant *v, bool write, uint32_t dst_offset,
+ const struct ir3_shader_variant *v, uint32_t dst_offset,
uint32_t num, struct pipe_resource **prscs, uint32_t *offsets);
@@ -151,7 +151,7 @@ ir3_emit_ubos(struct fd_screen *screen, const struct ir3_shader_variant *v,
assert(offset * 4 + params < v->constlen * 4);
- emit_const_bo(ring, v, false, offset * 4, params, prscs, offsets);
+ emit_const_bo(ring, v, offset * 4, params, prscs, offsets);
}
}
@@ -305,7 +305,7 @@ emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v,
assert(offset * 4 + params < v->constlen * 4);
- emit_const_bo(ring, v, true, offset * 4, params, prscs, offsets);
+ emit_const_bo(ring, v, offset * 4, params, prscs, offsets);
}
}
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