Mesa (staging/20.1): aco: fix 64-bit trunc with negative exponents on GFX6

[GitLab Mirror]

Module: Mesa
Branch: staging/20.1
Commit: fa01a9397fb6b6eee4d83dcf3252238c48d5dbe3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa01a9397fb6b6eee4d83dcf3252238c48d5dbe3

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed May  6 15:34:07 2020 +0200

aco: fix 64-bit trunc with negative exponents on GFX6

v_frexp_exp returns the exponent as an unsigned value.

Also, v_ashr returns either 0 or -1 depending on the sign of the
source operand, but what we want is only the sign bit.

Fixes a bunch of recent dEQP-VK.glsl.builtin.precision_double.* tests.

Cc: <mesa-stable at lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4921>
(cherry picked from commit 3fba0a7a6f01496344ddb93e774b2d4bc9195e8a)

---

 .pick_status.json                              | 2 +-
 src/amd/compiler/aco_instruction_selection.cpp | 5 +++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index c687e5c922b..a65e8bfe8a0 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -868,7 +868,7 @@
         "description": "aco: fix 64-bit trunc with negative exponents on GFX6",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index f9246247167..af838f0217e 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -884,7 +884,8 @@ Temp emit_trunc_f64(isel_context *ctx, Builder& bld, Definition dst, Temp val)
    bld.pseudo(aco_opcode::p_split_vector, Definition(val_lo), Definition(val_hi), val);
 
    /* Extract the exponent and compute the unbiased value. */
-   Temp exponent = bld.vop1(aco_opcode::v_frexp_exp_i32_f64, bld.def(v1), val);
+   Temp exponent = bld.vop3(aco_opcode::v_bfe_u32, bld.def(v1), val_hi, Operand(20u), Operand(11u));
+   exponent = bld.vsub32(bld.def(v1), exponent, Operand(1023u));
 
    /* Extract the fractional part. */
    Temp fract_mask = bld.pseudo(aco_opcode::p_create_vector, bld.def(v2), Operand(-1u), Operand(0x000fffffu));
@@ -900,7 +901,7 @@ Temp emit_trunc_f64(isel_context *ctx, Builder& bld, Definition dst, Temp val)
    fract_hi = bld.vop2(aco_opcode::v_and_b32, bld.def(v1), val_hi, tmp);
 
    /* Get the sign bit. */
-   Temp sign = bld.vop2(aco_opcode::v_ashr_i32, bld.def(v1), Operand(31u), val_hi);
+   Temp sign = bld.vop2(aco_opcode::v_and_b32, bld.def(v1), Operand(0x80000000u), val_hi);
 
    /* Decide the operation to apply depending on the unbiased exponent. */
    Temp exp_lt0 = bld.vopc_e64(aco_opcode::v_cmp_lt_i32, bld.hint_vcc(bld.def(bld.lm)), exponent, Operand(0u));