Mesa (staging/20.1): .pick_status.json: Update to 40ed7fcc0bac0cf46188a527deb44b038f0c0b59
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Thu May 21 13:30:56 UTC 2020
Module: Mesa
Branch: staging/20.1
Commit: b19b8d9abcfc5a264560aaee56d77e2f646ab76e
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b19b8d9abcfc5a264560aaee56d77e2f646ab76e
Author: Eric Engestrom <eric at engestrom.ch>
Date: Wed May 20 22:40:27 2020 +0200
.pick_status.json: Update to 40ed7fcc0bac0cf46188a527deb44b038f0c0b59
---
.pick_status.json | 288 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 288 insertions(+)
diff --git a/.pick_status.json b/.pick_status.json
index cf3a2787318..9fdb0f2f1b5 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1,4 +1,292 @@
[
+ {
+ "sha": "40ed7fcc0bac0cf46188a527deb44b038f0c0b59",
+ "description": "aco: fix typo in insert_waitcnt's kill()",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "51f4b22feec3720c89458094a3245efc984115ee",
+ "description": "aco: don't allow unaligned subdword accesses on GFX6/7",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "ae390755fea8b48f63314ecfd2699e1d2c375e76",
+ "description": "aco: fix corner case in register allocation",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "acec00eae0604dd439a665f2ae8942c16d057853",
+ "description": "aco: don't move create_vector subdword operands to unsupported register offsets",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5201985332dae703566764606cbbf4d6f56fc40d",
+ "description": "aco: restrict copying of create_vector operands to GFX9+",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8635c28a9264e24e5f0b64e68af31024945cda98",
+ "description": "clover: Address unnecessary copy warnings",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "15a27ed73b2df959b095b9e4e8413e77ee55ef30",
+ "description": "clover/api: Address missing braces for subobj init",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5500a2b7fc558217bbd4c2a966ab6fcadaed8b3b",
+ "description": "meson: Disable GCC's dead store elimination for memory zeroing custom new",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "a3045cbc97d7417e3036ba8f1f6f5189c1254407",
+ "description": "radv/winsys: remove useless free in radv_amdgpu_create_bo_list()",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "57a4837f6be2b0c8b6a9174d0a385c7f0bfb00e1",
+ "description": "radv: fix duplicated expression in ac_setup_rings()",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "ef042ae7c369ef7045ba73f79f633e0e76661fe9",
+ "description": "radv: fix missing break in radv_GetPhysicalDeviceFeatures2()",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": "57e796a12a883f5845c8e0ed05ec6bdb6d055b53"
+ },
+ {
+ "sha": "1ad9a8a884eccffb2a450746e5cda8d14da82004",
+ "description": "aco: fix missing break in label_instruction()",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "22554e1fbc20d0f642e952fda13d8f2631a898eb",
+ "description": "llvmpipe: compute shaders work better with all the threads.",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "master_sha": null,
+ "because_sha": "1b24e3ba756ba4951086d0b1b351364acbd3af1d"
+ },
+ {
+ "sha": "02a1f95386b43bf46cd1c8297d0955242f554fa2",
+ "description": "dri_util: Update internal_format to GL_RGB8 for MESA_FORMAT_R8G8B8X8_UNORM",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "master_sha": null,
+ "because_sha": "bf576772ab4d9e76dae716640bed6de879f19567"
+ },
+ {
+ "sha": "13fc03f4c0e709f6d1a8d811f9bc8a0c8c42943c",
+ "description": "freedreno/a6xx: Avoid stalling for occlusion queries",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "1c21577246691589f0295081d208894082444a02",
+ "description": "freedreno/a6xx: Emit VFD setup as array writes",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5f494636faf00ac5a2f6e88b0100c642fc04536a",
+ "description": "freedreno/a6xx: Allocate ringbuffer based on VFD count",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "3275b8082a5217888897665d6040bd16652950f8",
+ "description": "freedreno/a6xx: Map inputs to VFD entries up front",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5b7a73021cfa72a0e1bdccf5573b64b8b2e1eb97",
+ "description": "freedreno/a6xx: Create shader dependent streamout state at compile time",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "9bac0dd99b3fc6b11c31b6408fd86e9a5d8047de",
+ "description": "compiler: delete leftover autotools test wrapper",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "ba44990726cf935f54aa414b8430452358da23dc",
+ "description": "git_sha1_gen.py: fix whitespace",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c909370117d702d2d9e671ff9a611c85f30539c5",
+ "description": "git_sha1_gen.py: fix code style",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "413c6f9905262939cbe56cb021d7806eb7d97de1",
+ "description": "git_sha1_gen.py: fix out-of-date comment",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "f68db81cbb3c8f2b901fc5dcac02d01d3e698cc3",
+ "description": "anv: disable VK_EXT_calibrated_timestamps when the timestamp register is unreadable",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "a62ee262fd43f1c7f204de4e5b822d95c2ff6977",
+ "description": "anv: replace magic `| 1` with already #define'd name",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e27f311c859652e11d5e793a7041efc50cdbb2b3",
+ "description": "anv: pass the fd directly to anv_gem_reg_read()",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6bf40c28c9bf2e59b34ee7d7ce9e2698a57afba2",
+ "description": "ci: Make a530's GLES3/31 fractional runs much more complete.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6033c10092ae69ce2a0ad8fe0a25e124f6bbf50c",
+ "description": "ci: Disable SMP on the a5xx boards.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "d1b746284985a34e61c315ba586c789c607ac3ba",
+ "description": "i965/vec4: Ignore swizzle of VGRF for use by var_range_end()",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "master_sha": null,
+ "because_sha": "48dfb30f9231c22a6af6885dbc9ef86dc2edde1e"
+ },
+ {
+ "sha": "10095387f569bfe8a07dfe2f006209635a0b3647",
+ "description": "r600/sfn: fix nop channel assignment.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "34718070ef899b1faf3baeb3c741114ac1c04b0a",
+ "description": "docs: update calendar for 20.1.0-rc4",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "master_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "81201e461772a06ed2c20207d2901f6cf9a24114",
+ "description": "anv/gen11+: Disable object level preemption",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "master_sha": null,
+ "because_sha": null
+ },
{
"sha": "5a6beb6a24aa084adfd6c57edd0a64f0a044611a",
"description": "freedreno: add adreno 650",
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