Mesa (master): 38 new commits
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Thu May 21 18:05:36 UTC 2020
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=485ec761082ddfd952f80bb96b5fb5a607349b08
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Wed May 6 19:48:05 2020 -0400
panfrost: Guard experimental fp16 behind debug flag
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6293425bfe582e15b7a1460b14e33835b90c98f
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Wed May 13 18:24:25 2020 -0400
pan/mdg: Pack 8-bit swizzles in 16-bit ops
Let's inch closer to 8-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca48143ec4ba78ea472016add2c7531018549cbe
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 14 13:29:54 2020 -0400
pan/mdg: Implement condense_writemask for 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f768cb04ed114d7ac65d8bfbaf130002c81448d6
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 14 13:30:05 2020 -0400
pan/mdg: Implement vector constant printing for 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=28201af08038343e428036d5b4676d5eb74b0199
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Wed May 20 16:14:17 2020 -0400
pan/mdg: Use shifts instead of division for RA sizes
We're only dealing with powers-of-two, so this eliminates potential
issues with divisions-by-zero that are otherwise hacked around. Probably
faster too.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d435b334b4e22a89104728f0c32d8b2864b4903
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Wed May 13 11:05:49 2020 -0400
pan/mdg: Pack barriers correctly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fde1f2b7cb060c1fd5a00e1447bf69b8bbd15e8e
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Wed May 13 11:05:34 2020 -0400
pan/mdg: Fix type checking issues with compute
SSBO and barriers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e4c9f5f5ac4373dca5177cfcecc484a476cbf36
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 16:05:48 2020 -0400
pan/mdg: Separately pack constants to the upper half
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d475d19f097f6c6d65cf5cc5ef149ebfbddd80e9
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:58:58 2020 -0400
pan/mdg: Only combine 16-bit constants to lower half
We can't swizzle both halves simultaneously.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b4e278628baac10c0cef5a19906362cefb3ab61
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:52:18 2020 -0400
pan/mdg: Factor out mir_adjust_constant
Each source is semi-independent, we don't need the extra indentation
when the logic is already so complex.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b833702cc1b53cb6e0f0e486a56aa62d9650e79b
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:33:43 2020 -0400
pan/mdg: Print constant vectors less wrong
For !32-bit types, we need to pay attention to rep_low/high/half to
determine the effective swizzle.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd26bd9425e80dc3236942913f6bf6d670943003
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 13:49:03 2020 -0400
pan/mdg: Round up bytemasks when spilling
So we can pack the spills for <32-bit types.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=68d2a889b7a238b187cdf48afa2ed78874d3f23d
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 12:56:43 2020 -0400
pan/mdg: Print mask when dest=0
Forgot this convention differs from Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=553c2cf16b7612d4a70bd96230dad63777ec867e
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:07:25 2020 -0400
pan/mdg: Set RA bounds for fp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b91d71597e4fba907d27f2a82f070c5a25abde5f
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:06:53 2020 -0400
pan/mdg: Eliminate load_64
It can always be inferred from the types.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ff2cabe87601d95bf945339ee1b3ea4b4d8bc72
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:05:27 2020 -0400
pan/mdg: Use type size to determine alignment
Generally, f16 needs to be aligned to 16-bit, f32 to 32-bit, ...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=51582e54541a35b4eddd7dab98d8f676bcc46c53
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:03:58 2020 -0400
pan/lcra: Allow per-variable bounds to be set
Different variables need to respect different bounds. In general,
16-bytes is okay, but for 4-channel 16-bit vectors, we can't cross 8
byte boundaries (else the swizzles will not be packable after), so we
update LCRA to allow this more general form.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0737080ba611f6703a2cec5f4aa3389fc42338a4
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Wed May 6 18:17:02 2020 -0400
pan/lcra: Remove unused alignment parameters
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=21405f6fcfc428af3f2aa9d1bc1c3b10b25a71fa
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon May 11 15:02:10 2020 -0400
pan/mdg: Ignore dest.type when offseting load swizzle
It's always as-if 32-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f5bad649be3914a6965bda97ca275de989bb7c0
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 15:43:21 2020 -0400
pan/mdg: Don't generate conversions for fp16 LUTs
We can just set the register mode appropriately and then we don't have
to care anywhere else, and there's no extra NIR to chew through. Make
sure we include sqrt too.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6b023b35455c3b4329053b7381063f19611f4d38
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Fri May 8 17:42:40 2020 -0400
pan/mdg: Implement b2f16
...as iand
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1108eaa90de8507d405e7751db83764770eaa931
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Fri May 8 17:41:49 2020 -0400
pan/mdg: Streamline dest_override handling
We can pass it all off to emit time, and let the types in the IR do the
heavylifting in the meantime, which is a lot easier to get right.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e4793a95c2ead611b81365ea57789bff326d7db
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 19:11:38 2020 -0400
pan/mdg: Remove redundant redundancy
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1cd65353c9dce4fcb3dd70733b5366b04765caaa
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:38:27 2020 -0400
pan/mdg: Defer modifier packing until emit time
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=edf1479beaef2d2f674918cfec758c1823f21e71
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:32:20 2020 -0400
pan/mdg: Remove promote_float pass
Now unused.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=72c1e3a66a7ead84e0b895a7bb11d5501238a013
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:31:40 2020 -0400
pan/mdg: Promote imov to fmov on a NIR level
Avoids dedicated MIR promote_fmov pass which is unnecessary.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3cfe2fc1b19120ada25e4b4cd1134418162f3d9f
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:24:42 2020 -0400
pan/mdg: Identify scalar integer mods
Symmetric with vector mods, except for normal which is packed as
sign-extend. (flag 2 never seen in the wild)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4a42a78d89e4de356b514a569d87c6106b9145f
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:19:56 2020 -0400
pan/mdg: Use type to determine triviality of a move
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=df3d932bb4e0f0a2b6e1d08d142cfaeb034fefa4
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:16:48 2020 -0400
pan/mdg: Use src_types to determine size in scheduling
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=95dd478ed325fef8d947f771eae02513725f0f56
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:15:09 2020 -0400
pan/mdg: Add abs/neg/shift modifiers to IR
Rather than twiddling them into the ALU packed field.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=31e13956e128b9409a7c34f1b5c54081079c13cb
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 21 12:13:38 2020 -0400
pan/mdg: Explain ld/st sign/zero extension
Now we know why there are duplicates :-)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dbcae7c66719c53a0f8b5e4e3ed43d2223650558
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 16:10:09 2020 -0400
pan/mdg: Respect !32-bit sizes in RA
So we can take advantage of mediump.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c012c8f8bb1871486d7f46fd98ff97c857fa64d
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 16:09:47 2020 -0400
pan/mdg: Handle dest up/lower correctly with swizzles
During emit time.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8084fc3b6615201165ebf1bd46ecd91606d1849b
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 13:43:13 2020 -0400
pan/mdg: Include more types
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9a4bd90a86b6c25aec388394af3a888f1184e7c
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 13:06:26 2020 -0400
pan/mdg: Remove mir_get_alu_src
Unused.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9915bb2c40b0cad628536d179eac47ccf3325860
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 10:12:38 2020 -0400
pan/mdg: Remove mir_*size routines
We'd rather use the actual type information than inferring modes all
over the place.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=40e9bee714ebecd8ebbba39d81712ba3714319f4
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 10:13:35 2020 -0400
pan/mdg: Fix constant combining crash
We need to round up.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb28a3669be8e9d13b80d1a2859120058c9bccb5
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Thu May 7 10:12:24 2020 -0400
pan/mdg: Handle comparisons in fp16 path
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
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