Mesa (master): radeonsi: don't enable TC-compatible HTILE for stencil if stencil doesn't use it

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Module: Mesa
Branch: master
Commit: d30e1e486dd2e78bbf98ce24cc2f3c7f4f22b56f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d30e1e486dd2e78bbf98ce24cc2f3c7f4f22b56f

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue May 19 19:29:21 2020 -0400

radeonsi: don't enable TC-compatible HTILE for stencil if stencil doesn't use it

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>

---

 src/gallium/drivers/radeonsi/si_blit.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index fada003f6cf..ab7c031af23 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -367,7 +367,8 @@ static void si_decompress_depth(struct si_context *sctx, struct si_texture *tex,
        * the decompression is much worse.
        */
       if (has_htile && !tc_compat_htile &&
-          tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE)
+          tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE &&
+          (inplace_planes & PIPE_MASK_Z || !tex->htile_stencil_disabled))
          tex->enable_tc_compatible_htile_next_clear = true;
 
       /* Only in-place decompression needs to flush DB caches, or