Mesa (master): intel/fs: Early return when can't satisfy explicit group size

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Module: Mesa
Branch: master
Commit: 462bc408fe953d8d4e914e78c7faef057e806872
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=462bc408fe953d8d4e914e78c7faef057e806872

Author: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Date:   Tue May 19 09:44:55 2020 -0700

intel/fs: Early return when can't satisfy explicit group size

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5213>

---

 src/intel/compiler/brw_fs.cpp | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 56de5950962..e810f1fe769 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -9053,10 +9053,6 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
    assert(min_dispatch_width <= 32);
    unsigned max_dispatch_width = 32;
 
-   fs_visitor *v8 = NULL, *v16 = NULL, *v32 = NULL;
-   fs_visitor *v = NULL;
-   const char *fail_msg = NULL;
-
    if ((int)key->base.subgroup_size_type >= (int)BRW_SUBGROUP_SIZE_REQUIRE_8) {
       /* These enum values are expressly chosen to be equal to the subgroup
        * size that they require.
@@ -9068,15 +9064,22 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
              required_dispatch_width == 32);
       if (required_dispatch_width < min_dispatch_width ||
           required_dispatch_width > max_dispatch_width) {
-         fail_msg = "Cannot satisfy explicit subgroup size";
-      } else {
-         min_dispatch_width = max_dispatch_width = required_dispatch_width;
+         if (error_str) {
+            *error_str = ralloc_strdup(mem_ctx,
+                                       "Cannot satisfy explicit subgroup size");
+         }
+         return NULL;
       }
+      min_dispatch_width = max_dispatch_width = required_dispatch_width;
    }
 
+   fs_visitor *v8 = NULL, *v16 = NULL, *v32 = NULL;
+   fs_visitor *v = NULL;
+   const char *fail_msg = NULL;
+
    /* Now the main event: Visit the shader IR and generate our CS IR for it.
     */
-   if (!fail_msg && min_dispatch_width <= 8 && max_dispatch_width >= 8) {
+   if (min_dispatch_width <= 8 && max_dispatch_width >= 8) {
       nir_shader *nir8 = compile_cs_to_nir(compiler, mem_ctx, key,
                                            src_shader, 8);
       v8 = new fs_visitor(compiler, log_data, mem_ctx, &key->base,