Mesa (master): aco: allow gfx10_wave64_bpermute with 8-bit/16-bit input

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 83dcd1690be5dbf7129ed05cc12043130a2f875c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=83dcd1690be5dbf7129ed05cc12043130a2f875c

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Mon May 18 17:01:46 2020 +0200

aco: allow gfx10_wave64_bpermute with 8-bit/16-bit input

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>

---

 src/amd/compiler/aco_lower_to_hw_instr.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp
index 7ff1615b1f9..11f7401213f 100644
--- a/src/amd/compiler/aco_lower_to_hw_instr.cpp
+++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp
@@ -1522,7 +1522,7 @@ void lower_to_hw_instr(Program* program)
                assert(instr->operands[0].physReg() == vcc); /* Compare */
                assert(instr->operands[1].regClass() == v2.as_linear()); /* Temp VGPR pair */
                assert(instr->operands[2].regClass() == v1); /* Indices x4 */
-               assert(instr->operands[3].regClass() == v1); /* Input data */
+               assert(instr->operands[3].bytes() <= 4); /* Indices x4 */
 
                PhysReg shared_vgpr_reg_lo = PhysReg(align(program->config->num_vgprs, 4) + 256);
                PhysReg shared_vgpr_reg_hi = PhysReg(shared_vgpr_reg_lo + 1);