Mesa (master): amd/llvm,aco: Replace VLA with alloca
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Tue Nov 3 07:55:16 UTC 2020
Module: Mesa
Branch: master
Commit: 4bd18e772a28e574562c40d81eafd76834faf185
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4bd18e772a28e574562c40d81eafd76834faf185
Author: James Park <jpark37 at lagfreegames.com>
Date: Mon Aug 10 21:00:51 2020 -0700
amd/llvm,aco: Replace VLA with alloca
MSVC will never support VLA, so use alloca instead.
Reviewed-by: Tony Wasserka <tony.wasserka at gmx.de>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7157>
---
src/amd/compiler/aco_instruction_selection.cpp | 12 ++++++------
src/amd/compiler/aco_lower_phis.cpp | 2 +-
src/amd/compiler/aco_print_ir.cpp | 8 ++++----
src/amd/compiler/aco_register_allocation.cpp | 2 +-
src/amd/llvm/ac_llvm_build.c | 6 +++---
src/amd/llvm/ac_nir_to_llvm.c | 6 +++---
6 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 37d3a234f71..73792d30c43 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -2964,7 +2964,7 @@ void emit_load(isel_context *ctx, Builder &bld, const LoadEmitInfo &info,
unsigned component_size = info.component_size;
unsigned num_vals = 0;
- Temp vals[info.dst.bytes()];
+ Temp *const vals = (Temp *)alloca(info.dst.bytes() * sizeof(Temp));
unsigned const_offset = info.const_offset;
@@ -3121,7 +3121,7 @@ void emit_load(isel_context *ctx, Builder &bld, const LoadEmitInfo &info,
std::array<Temp, NIR_MAX_VEC_COMPONENTS> allocated_vec;
bool has_vgprs = false;
for (unsigned i = 0; i < num_vals;) {
- Temp tmp[num_vals];
+ Temp *const tmp = (Temp *)alloca(num_vals * sizeof(Temp));
unsigned num_tmps = 0;
unsigned tmp_size = 0;
RegType reg_type = RegType::sgpr;
@@ -4614,7 +4614,7 @@ void visit_load_input(isel_context *ctx, nir_intrinsic_instr *instr)
get_arg(ctx, ctx->args->ac.vertex_id));
}
- Temp channels[num_channels];
+ Temp *const channels = (Temp *)alloca(num_channels * sizeof(Temp));
unsigned channel_start = 0;
bool direct_fetch = false;
@@ -8880,7 +8880,7 @@ void visit_tex(isel_context *ctx, nir_tex_instr *instr)
if (tg4_integer_cube_workaround) {
// see comment in ac_nir_to_llvm.c's lower_gather4_integer()
- Temp desc[resource.size()];
+ Temp *const desc = (Temp *)alloca(resource.size() * sizeof(Temp));
aco_ptr<Instruction> split{create_instruction<Pseudo_instruction>(aco_opcode::p_split_vector,
Format::PSEUDO, 1, resource.size())};
split->operands[0] = Operand(resource);
@@ -9210,7 +9210,7 @@ void visit_phi(isel_context *ctx, nir_phi_instr *instr)
std::vector<unsigned>& preds = logical ? ctx->block->logical_preds : ctx->block->linear_preds;
unsigned num_operands = 0;
- Operand operands[std::max(exec_list_length(&instr->srcs), (unsigned)preds.size()) + 1];
+ Operand *const operands = (Operand *)alloca((std::max(exec_list_length(&instr->srcs), (unsigned)preds.size()) + 1) * sizeof(Operand));
unsigned num_defined = 0;
unsigned cur_pred_idx = 0;
for (std::pair<unsigned, nir_ssa_def *> src : phi_src) {
@@ -9662,7 +9662,7 @@ static void visit_loop(isel_context *ctx, nir_loop *loop)
* merge block would get CSE'd */
if (nir_loop_last_block(loop)->successors[0] != nir_loop_first_block(loop)) {
unsigned num_vals = ctx->cf_info.has_branch ? 1 : (ctx->block->index - loop_header_idx + 1);
- Operand vals[num_vals];
+ Operand *const vals = (Operand *)alloca(num_vals * sizeof(Operand));
for (aco_ptr<Instruction>& instr : ctx->program->blocks[loop_header_idx].instructions) {
if (instr->opcode == aco_opcode::p_linear_phi) {
if (ctx->cf_info.has_branch)
diff --git a/src/amd/compiler/aco_lower_phis.cpp b/src/amd/compiler/aco_lower_phis.cpp
index 42e2e8997bf..838c1807a74 100644
--- a/src/amd/compiler/aco_lower_phis.cpp
+++ b/src/amd/compiler/aco_lower_phis.cpp
@@ -79,7 +79,7 @@ Operand get_ssa(Program *program, unsigned block_idx, ssa_state *state, bool bef
Temp res = Temp(program->allocateTmp(program->lane_mask));
state->latest[block_idx] = Operand(res);
- Operand ops[pred];
+ Operand *const ops = (Operand *)alloca(pred * sizeof(Operand));
for (unsigned i = 0; i < pred; i++)
ops[i] = get_ssa(program, block.linear_preds[i], state, false);
diff --git a/src/amd/compiler/aco_print_ir.cpp b/src/amd/compiler/aco_print_ir.cpp
index 8172ab0d857..2a90a0af2fe 100644
--- a/src/amd/compiler/aco_print_ir.cpp
+++ b/src/amd/compiler/aco_print_ir.cpp
@@ -678,10 +678,10 @@ void aco_print_instr(const Instruction *instr, FILE *output)
}
fprintf(output, "%s", instr_info.name[(int)instr->opcode]);
if (instr->operands.size()) {
- bool abs[instr->operands.size()];
- bool neg[instr->operands.size()];
- bool opsel[instr->operands.size()];
- uint8_t sel[instr->operands.size()];
+ bool *const abs = (bool *)alloca(instr->operands.size() * sizeof(bool));
+ bool *const neg = (bool *)alloca(instr->operands.size() * sizeof(bool));
+ bool *const opsel = (bool *)alloca(instr->operands.size() * sizeof(bool));
+ uint8_t *const sel = (uint8_t *)alloca(instr->operands.size() * sizeof(uint8_t));
if ((int)instr->format & (int)Format::VOP3A) {
const VOP3A_instruction* vop3 = static_cast<const VOP3A_instruction*>(instr);
for (unsigned i = 0; i < instr->operands.size(); ++i) {
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index 2561baefc1a..693309781be 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -1614,7 +1614,7 @@ Temp handle_live_in(ra_ctx& ctx, Temp val, Block* block)
new_val = read_variable(ctx, val, preds[0]);
} else {
/* there are multiple predecessors and the block is sealed */
- Temp ops[preds.size()];
+ Temp *const ops = (Temp *)alloca(preds.size() * sizeof(Temp));
/* get the rename from each predecessor and check if they are the same */
bool needs_phi = false;
diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c
index ada9c4dbccf..f425cee8a16 100644
--- a/src/amd/llvm/ac_llvm_build.c
+++ b/src/amd/llvm/ac_llvm_build.c
@@ -572,7 +572,7 @@ static LLVMValueRef ac_build_expand(struct ac_llvm_context *ctx, LLVMValueRef va
unsigned src_channels, unsigned dst_channels)
{
LLVMTypeRef elemtype;
- LLVMValueRef chan[dst_channels];
+ LLVMValueRef *const chan = alloca(dst_channels * sizeof(LLVMValueRef));
if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMVectorTypeKind) {
unsigned vec_size = LLVMGetVectorSize(LLVMTypeOf(value));
@@ -605,7 +605,7 @@ static LLVMValueRef ac_build_expand(struct ac_llvm_context *ctx, LLVMValueRef va
LLVMValueRef ac_extract_components(struct ac_llvm_context *ctx, LLVMValueRef value, unsigned start,
unsigned channels)
{
- LLVMValueRef chan[channels];
+ LLVMValueRef *const chan = alloca(channels * sizeof(LLVMValueRef));
for (unsigned i = 0; i < channels; i++)
chan[i] = ac_llvm_extract_elem(ctx, value, i + start);
@@ -3216,7 +3216,7 @@ LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value, uns
if (count == num_components)
return value;
- LLVMValueRef masks[MAX2(count, 2)];
+ LLVMValueRef *const masks = alloca(MAX2(count, 2) * sizeof(LLVMValueRef));
masks[0] = ctx->i32_0;
masks[1] = ctx->i32_1;
for (unsigned i = 2; i < count; i++)
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index 31ca89b214e..12bfe6990f2 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -1523,7 +1523,7 @@ static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx, nir_int
unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
if (offset + count <= num_inline_push_consts) {
- LLVMValueRef push_constants[num_inline_push_consts];
+ LLVMValueRef *const push_constants = alloca(num_inline_push_consts * sizeof(LLVMValueRef));
for (unsigned i = 0; i < num_inline_push_consts; i++)
push_constants[i] = ac_get_arg(&ctx->ac, ctx->args->inline_push_consts[i]);
return ac_build_gather_values(&ctx->ac, push_constants + offset, count);
@@ -2118,7 +2118,7 @@ static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx, nir_intrin
if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
unsigned load_bytes = instr->dest.ssa.bit_size / 8;
- LLVMValueRef results[num_components];
+ LLVMValueRef *const results = alloca(num_components * sizeof(LLVMValueRef));
for (unsigned i = 0; i < num_components; ++i) {
LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, load_bytes * i, 0);
@@ -4491,7 +4491,7 @@ static LLVMTypeRef glsl_to_llvm_type(struct ac_llvm_context *ac, const struct gl
assert(glsl_type_is_struct_or_ifc(type));
- LLVMTypeRef member_types[glsl_get_length(type)];
+ LLVMTypeRef *const member_types = alloca(glsl_get_length(type) * sizeof(LLVMTypeRef));
for (unsigned i = 0; i < glsl_get_length(type); i++) {
member_types[i] = glsl_to_llvm_type(ac, glsl_get_struct_field(type, i));
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