Mesa (master): pan/bi: Move special instruction packing to a separate helper

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Module: Mesa
Branch: master
Commit: 20cc63815cd5ed355530125f42a26bc65bb2fd5b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=20cc63815cd5ed355530125f42a26bc65bb2fd5b

Author: Boris Brezillon <boris.brezillon at collabora.com>
Date:   Wed Oct 28 08:56:20 2020 +0100

pan/bi: Move special instruction packing to a separate helper

Signed-off-by: Boris Brezillon <boris.brezillon at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7408>

---

 src/panfrost/bifrost/bi_pack.c | 39 ++++++++++++++++++++++++---------------
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/src/panfrost/bifrost/bi_pack.c b/src/panfrost/bifrost/bi_pack.c
index ba2bc55162c..fbf7bcbf493 100644
--- a/src/panfrost/bifrost/bi_pack.c
+++ b/src/panfrost/bifrost/bi_pack.c
@@ -657,6 +657,29 @@ bi_pack_add_branch(bi_instruction *ins, bi_registers *regs)
                 return bi_pack_add_branch_cond(ins, regs);
 }
 
+static unsigned
+bi_pack_add_special(bi_clause *clause, bi_instruction *ins, bi_registers *regs)
+{
+        bool f16 = ins->dest_type == nir_type_float16;
+
+        switch (ins->op.special) {
+        case BI_SPECIAL_FRCP:
+                return f16 ? pan_pack_add_frcp_f16(clause, ins, regs) :
+                             pan_pack_add_frcp_f32(clause, ins, regs);
+        case BI_SPECIAL_FRSQ:
+                return f16 ? pan_pack_add_frsq_f16(clause, ins, regs) :
+                             pan_pack_add_frsq_f32(clause, ins, regs);
+        case BI_SPECIAL_EXP2_LOW:
+                assert(!f16);
+                return pan_pack_add_fexp_f32(clause, ins, regs);
+        case BI_SPECIAL_IABS:
+                assert(ins->src_types[0] == nir_type_int32);
+                return pan_pack_add_iabs_s32(clause, ins, regs);
+        default:
+                unreachable("Unknown special op");
+        }
+}
+
 static unsigned
 bi_pack_add(bi_clause *clause, bi_bundle bundle, bi_registers *regs, gl_shader_stage stage)
 {
@@ -850,21 +873,7 @@ bi_pack_add(bi_clause *clause, bi_bundle bundle, bi_registers *regs, gl_shader_s
         case BI_STORE_VAR:
                 return pan_pack_add_st_cvt(clause, bundle.add, regs);
         case BI_SPECIAL:
-                if (bundle.add->op.special == BI_SPECIAL_FRCP) {
-                        return f16 ? pan_pack_add_frcp_f16(clause, bundle.add, regs) :
-                                pan_pack_add_frcp_f32(clause, bundle.add, regs);
-                } else if (bundle.add->op.special == BI_SPECIAL_FRSQ) {
-                        return f16 ? pan_pack_add_frsq_f16(clause, bundle.add, regs) :
-                                pan_pack_add_frsq_f32(clause, bundle.add, regs);
-                } else if (bundle.add->op.special == BI_SPECIAL_EXP2_LOW) {
-                        assert(!f16);
-                        return pan_pack_add_fexp_f32(clause, bundle.add, regs);
-                } else if (bundle.add->op.special == BI_SPECIAL_IABS) {
-                        assert(bundle.add->src_types[0] == nir_type_int32);
-                        return pan_pack_add_iabs_s32(clause, bundle.add, regs);
-                }
-
-                unreachable("Unknown special op");
+                return bi_pack_add_special(clause, bundle.add, regs);
         case BI_TABLE:
                 assert(bundle.add->dest_type == nir_type_float32);
                 return pan_pack_add_flogd_f32(clause, bundle.add, regs);