Mesa (master): radv,radv/winsys: Move RADV_MAX_IBS_PER_SUBMIT

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Module: Mesa
Branch: master
Commit: bfa9fd88fc7c942ca684602fb497fc3e50cbfc4f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfa9fd88fc7c942ca684602fb497fc3e50cbfc4f

Author: James Park <jpark37 at lagfreegames.com>
Date:   Sun Nov  1 00:04:42 2020 -0700

radv,radv/winsys: Move RADV_MAX_IBS_PER_SUBMIT

RADV_MAX_IBS_PER_SUBMIT needs to be defined even for the null driver.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7394>

---

 src/amd/vulkan/radv_device.c                             | 7 +++++++
 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h | 7 -------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index c6bdf4f392a..42cb023156b 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -56,6 +56,13 @@
 #include "compiler/glsl_types.h"
 #include "util/driconf.h"
 
+/* The number of IBs per submit isn't infinite, it depends on the ring type
+ * (ie. some initial setup needed for a submit) and the number of IBs (4 DW).
+ * This limit is arbitrary but should be safe for now.  Ideally, we should get
+ * this limit from the KMD.
+*/
+#define RADV_MAX_IBS_PER_SUBMIT 192
+
 /* The "RAW" clocks on Linux are called "FAST" on FreeBSD */
 #if !defined(CLOCK_MONOTONIC_RAW) && defined(CLOCK_MONOTONIC_FAST)
 #define CLOCK_MONOTONIC_RAW CLOCK_MONOTONIC_FAST
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h
index e8b8298c6c8..790a404d24a 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h
@@ -29,13 +29,6 @@
 #ifndef RADV_AMDGPU_WINSYS_PUBLIC_H
 #define RADV_AMDGPU_WINSYS_PUBLIC_H
 
-/* The number of IBs per submit isn't infinite, it depends on the ring type
- * (ie. some initial setup needed for a submit) and the number of IBs (4 DW).
- * This limit is arbitrary but should be safe for now.  Ideally, we should get
- * this limit from the KMD.
-*/
-#define RADV_MAX_IBS_PER_SUBMIT 192
-
 struct radeon_winsys *radv_amdgpu_winsys_create(int fd, uint64_t debug_flags,
 						uint64_t perftest_flags);