Mesa (master): pan/bi: Model writemasks correctly

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 7737ca75391d5ea930390037178a277d309a83af
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7737ca75391d5ea930390037178a277d309a83af

Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Mon Nov  9 13:44:07 2020 -0500

pan/bi: Model writemasks correctly

We don't handle partial write masks in the backend yet, so for now we
can't pretend we do, else we'll have RA bugs. Fixes

dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_dst_alpha

Fixes: b2c6cf2b6db1 ("pan/bi: Eliminate writemasks in the IR")
Cc: 20.3 <mesa-stable>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Reported-by: Boris Brezillon <boris.brezillon at collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Tested-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7527>

---

 .gitlab-ci/deqp-panfrost-g52-fails.txt | 25 -------------------------
 src/panfrost/bifrost/bir.c             |  6 +++++-
 2 files changed, 5 insertions(+), 26 deletions(-)

diff --git a/.gitlab-ci/deqp-panfrost-g52-fails.txt b/.gitlab-ci/deqp-panfrost-g52-fails.txt
index affce53fe4c..ea20b358e8e 100644
--- a/.gitlab-ci/deqp-panfrost-g52-fails.txt
+++ b/.gitlab-ci/deqp-panfrost-g52-fails.txt
@@ -28,31 +28,6 @@ dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb,Fail
 dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_depth_component16,Fail
 dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgb_stencil_index8,Fail
 dEQP-GLES2.functional.fbo.render.texsubimage.between_render_tex2d_rgb,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_dst_alpha,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_dst_color,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_one_minus_dst_alpha,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_one_minus_dst_color,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.one_minus_constant_color_dst_alpha,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.one_minus_constant_color_dst_color,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.one_minus_constant_color_one_minus_dst_alpha,Fail
-dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.one_minus_constant_color_one_minus_dst_color,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.14,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.22,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.31,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.32,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.42,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.43,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.61,Fail
-dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.67,Fail
-dEQP-GLES2.functional.fragment_ops.random.11,Fail
-dEQP-GLES2.functional.fragment_ops.random.24,Fail
-dEQP-GLES2.functional.fragment_ops.random.41,Fail
-dEQP-GLES2.functional.fragment_ops.random.45,Fail
-dEQP-GLES2.functional.fragment_ops.random.48,Fail
-dEQP-GLES2.functional.fragment_ops.random.5,Fail
-dEQP-GLES2.functional.fragment_ops.random.51,Fail
-dEQP-GLES2.functional.fragment_ops.random.67,Fail
-dEQP-GLES2.functional.fragment_ops.random.98,Fail
 dEQP-GLES2.functional.negative_api.shader.uniform_matrixfv_invalid_transpose,Fail
 dEQP-GLES2.functional.negative_api.texture.generatemipmap_zero_level_array_compressed,Fail
 dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz,Fail
diff --git a/src/panfrost/bifrost/bir.c b/src/panfrost/bifrost/bir.c
index 989298e25db..d895209f05c 100644
--- a/src/panfrost/bifrost/bir.c
+++ b/src/panfrost/bifrost/bir.c
@@ -168,6 +168,10 @@ bi_writes_component(bi_instruction *ins, unsigned comp)
         return comp < bi_get_component_count(ins, -1);
 }
 
+/* Determine effective writemask for RA/DCE, noting that we currently act
+ * per-register hence aligning. TODO: when real write masks are handled in
+ * packing (not for a while), update this routine, removing the align */
+
 unsigned
 bi_writemask(bi_instruction *ins)
 {
@@ -175,7 +179,7 @@ bi_writemask(bi_instruction *ins)
         unsigned size = nir_alu_type_get_type_size(T);
         unsigned bytes_per_comp = size / 8;
         unsigned components = bi_get_component_count(ins, -1);
-        unsigned bytes = bytes_per_comp * components;
+        unsigned bytes = ALIGN_POT(bytes_per_comp * components, 4);
         unsigned mask = (1 << bytes) - 1;
         unsigned shift = ins->dest_offset * 4; /* 32-bit words */
         return (mask << shift);