Mesa (master): pan/bi: Force BLEND src0 to r0

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Module: Mesa
Branch: master
Commit: 8379ff292c4544bfce22bb795311bd180a6c999c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8379ff292c4544bfce22bb795311bd180a6c999c

Author: Boris Brezillon <boris.brezillon at collabora.com>
Date:   Thu Nov 12 15:59:22 2020 +0100

pan/bi: Force BLEND src0 to r0

Blend shaders expect the input color to be passed through r0-r3, let's
enforce that when we allocate registers.

Signed-off-by: Boris Brezillon <boris.brezillon at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>

---

 src/panfrost/bifrost/bi_ra.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/panfrost/bifrost/bi_ra.c b/src/panfrost/bifrost/bi_ra.c
index 3d28e15f661..3d82edcf094 100644
--- a/src/panfrost/bifrost/bi_ra.c
+++ b/src/panfrost/bifrost/bi_ra.c
@@ -82,12 +82,17 @@ bi_allocate_registers(bi_context *ctx, bool *success)
         bi_foreach_instr_global(ctx, ins) {
                 unsigned dest = ins->dest;
 
+                /* Blend shaders expect the src colour to be in r0-r3 */
+                if (ins->type == BI_BLEND && !ctx->is_blend)
+                        l->solutions[ins->src[0]] = 0;
+
                 if (!dest || (dest >= node_count))
                         continue;
 
                 l->class[dest] = BI_REG_CLASS_WORK;
                 lcra_set_alignment(l, dest, 2, 16); /* 2^2 = 4 */
                 lcra_restrict_range(l, dest, 4);
+
         }
 
         bi_compute_interference(ctx, l);