Mesa (master): pan/bi: Add support for tex offsets

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Module: Mesa
Branch: master
Commit: 54a965b153f80cff792853f262a09cfc7987f777
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=54a965b153f80cff792853f262a09cfc7987f777

Author: Boris Brezillon <boris.brezillon at collabora.com>
Date:   Mon Nov  9 12:21:03 2020 +0100

pan/bi: Add support for tex offsets

Signed-off-by: Boris Brezillon <boris.brezillon at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>

---

 src/panfrost/bifrost/bifrost_compile.c | 38 ++++++++++++++++++++++++++++------
 1 file changed, 32 insertions(+), 6 deletions(-)

diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index 2e4d156e278..f36460ce412 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -1588,21 +1588,47 @@ bi_emit_tex_offset_ms_index(bi_context *ctx, nir_tex_instr *instr)
 {
         unsigned dest = 0;
 
-        /* TODO: offsets */
-        assert(nir_tex_instr_src_index(instr, nir_tex_src_offset) < 0);
+        int offs_idx = nir_tex_instr_src_index(instr, nir_tex_src_offset);
+        if (offs_idx >= 0 &&
+            (!nir_src_is_const(instr->src[offs_idx].src) ||
+             nir_src_as_uint(instr->src[offs_idx].src) != 0)) {
+                bi_instruction mkvec = {
+                        .type = BI_SELECT,
+                        .dest = bi_make_temp(ctx),
+                        .dest_type = nir_type_uint32,
+                        .src = {
+                                BIR_INDEX_ZERO, BIR_INDEX_ZERO,
+                                BIR_INDEX_ZERO, BIR_INDEX_ZERO
+                        },
+                        .src_types = {
+                                nir_type_uint8, nir_type_uint8,
+                                nir_type_uint8, nir_type_uint8
+                        }
+                };
+
+                unsigned ncomps = nir_src_num_components(instr->src[offs_idx].src);
+                unsigned src = pan_src_index(&instr->src[offs_idx].src);
+                for (unsigned i = 0; i < ncomps; i++) {
+                        mkvec.src[i] = src;
+                        mkvec.swizzle[i][0] = i * 4;
+                }
+
+                bi_emit(ctx, mkvec);
+                dest = mkvec.dest;
+        }
 
         int ms_idx = nir_tex_instr_src_index(instr, nir_tex_src_ms_index);
         if (ms_idx >= 0 &&
             (!nir_src_is_const(instr->src[ms_idx].src) ||
              nir_src_as_uint(instr->src[ms_idx].src) != 0)) {
-                bi_instruction shl = {
+                bi_instruction or = {
                         .type = BI_BITWISE,
                         .op.bitwise = BI_BITWISE_OR,
                         .dest = bi_make_temp(ctx),
                         .dest_type = nir_type_uint32,
                         .src = {
                                 pan_src_index(&instr->src[ms_idx].src),
-                                BIR_INDEX_ZERO,
+                                dest ? dest : BIR_INDEX_ZERO,
                                 BIR_INDEX_CONSTANT | 0,
                         },
                         .src_types = {
@@ -1613,8 +1639,8 @@ bi_emit_tex_offset_ms_index(bi_context *ctx, nir_tex_instr *instr)
                         .constant.u8[0] = 24,
                 };
 
-                bi_emit(ctx, shl);
-                dest = shl.dest;
+                bi_emit(ctx, or);
+                dest = or.dest;
         }
 
         return dest;