Mesa (master): radeonsi: read vs_state_bits in vs_prolog correctly

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Module: Mesa
Branch: master
Commit: 2b2b22f496d073847bf94f4db9ba47275444be58
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b2b22f496d073847bf94f4db9ba47275444be58

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Oct 16 22:07:09 2020 -0400

radeonsi: read vs_state_bits in vs_prolog correctly

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>

---

 src/gallium/drivers/radeonsi/si_shader_llvm_vs.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c
index 2d766532cbe..e29c2511520 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c
@@ -906,7 +906,9 @@ void si_llvm_build_vs_prolog(struct si_shader_context *ctx, union si_shader_part
          };
          LLVMValueRef is_odd = LLVMBuildTrunc(ctx->ac.builder, thread_id_in_tg, ctx->ac.i1, "");
          LLVMValueRef flatshade_first = LLVMBuildICmp(
-            builder, LLVMIntEQ, si_unpack_param(ctx, ctx->vs_state_bits, 4, 2), ctx->ac.i32_0, "");
+            builder, LLVMIntEQ,
+            si_unpack_param(ctx, input_sgpr_param[8 + SI_SGPR_VS_STATE_BITS], 4, 2),
+            ctx->ac.i32_0, "");
 
          ac_build_triangle_strip_indices_to_triangle(&ctx->ac, is_odd, flatshade_first, index);
          input_vgprs[0] = index[0];