Mesa (master): aco: use v_mul_imm() for some nir_op_imul

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Module: Mesa
Branch: master
Commit: aab507c6b051be99551373b36be19d14a9cbeab0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aab507c6b051be99551373b36be19d14a9cbeab0

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Fri Jun  5 17:54:43 2020 +0100

aco: use v_mul_imm() for some nir_op_imul

Some of the optimizations v_mul_imm() does are complex and very
target-specific and not suitable to do in ACO's optimizer.

fossil-db (Vega):
Totals from 49135 (35.76% of 137413) affected shaders:
SGPRs: 2698547 -> 2696103 (-0.09%); split: -0.16%, +0.07%
VGPRs: 2301412 -> 2301600 (+0.01%); split: -0.01%, +0.02%
SpillSGPRs: 51520 -> 51519 (-0.00%)
CodeSize: 168798572 -> 169164012 (+0.22%); split: -0.00%, +0.22%
MaxWaves: 306553 -> 306539 (-0.00%); split: +0.00%, -0.01%
Instrs: 33423982 -> 33506598 (+0.25%); split: -0.00%, +0.25%
Cycles: 1807800632 -> 1804101376 (-0.20%); split: -0.20%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5390>

---

 src/amd/compiler/aco_instruction_selection.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 645c530a784..f8d044c576e 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -1752,6 +1752,12 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
             bld.vop3(aco_opcode::v_mad_u32_u16, Definition(dst), bld.set16bit(op0), bld.set16bit(op1), Operand(0u));
          } else if (src0_ub <= 0xffffff && src1_ub <= 0xffffff) {
             emit_vop2_instruction(ctx, instr, aco_opcode::v_mul_u32_u24, dst, true);
+         } else if (nir_src_is_const(instr->src[0].src)) {
+            bld.v_mul_imm(Definition(dst), get_alu_src(ctx, instr->src[1]),
+                          nir_src_as_uint(instr->src[0].src), false);
+         } else if (nir_src_is_const(instr->src[1].src)) {
+            bld.v_mul_imm(Definition(dst), get_alu_src(ctx, instr->src[0]),
+                          nir_src_as_uint(instr->src[1].src), false);
          } else {
             emit_vop3a_instruction(ctx, instr, aco_opcode::v_mul_lo_u32, dst);
          }