Mesa (master): radeonsi: don't generate a dead conditional in si_write_tess_factors on gfx9+
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Mon Nov 23 03:15:54 UTC 2020
Module: Mesa
Branch: master
Commit: c605de30ebcfe1eb883c011dcb7db69e38c015c6
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c605de30ebcfe1eb883c011dcb7db69e38c015c6
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Nov 14 00:05:00 2020 -0500
radeonsi: don't generate a dead conditional in si_write_tess_factors on gfx9+
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
---
src/gallium/drivers/radeonsi/si_shader_llvm_tess.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
index 1ee6ffd547e..112e4486b79 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
@@ -777,20 +777,18 @@ static void si_write_tess_factors(struct si_shader_context *ctx, LLVMValueRef re
tf_base = ac_get_arg(&ctx->ac, ctx->tcs_factor_offset);
byteoffset =
LLVMBuildMul(ctx->ac.builder, rel_patch_id, LLVMConstInt(ctx->ac.i32, 4 * stride, 0), "");
-
- ac_build_ifcc(&ctx->ac,
- LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, rel_patch_id, ctx->ac.i32_0, ""), 6504);
+ offset = 0;
/* Store the dynamic HS control word. */
- offset = 0;
if (ctx->screen->info.chip_class <= GFX8) {
+ ac_build_ifcc(&ctx->ac,
+ LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, rel_patch_id, ctx->ac.i32_0, ""), 6504);
ac_build_buffer_store_dword(&ctx->ac, buffer, LLVMConstInt(ctx->ac.i32, 0x80000000, 0), 1,
ctx->ac.i32_0, tf_base, offset, ac_glc);
+ ac_build_endif(&ctx->ac, 6504);
offset += 4;
}
- ac_build_endif(&ctx->ac, 6504);
-
/* Store the tessellation factors. */
ac_build_buffer_store_dword(&ctx->ac, buffer, vec0, MIN2(stride, 4), byteoffset, tf_base, offset,
ac_glc);
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