Mesa (master): r600/sfn: Lower tess-eval IO

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Module: Mesa
Branch: master
Commit: eafa9bff805a2aa0cb956b31d57d09edc9a04dcc
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eafa9bff805a2aa0cb956b31d57d09edc9a04dcc

Author: Gert Wollny <gert.wollny at collabora.com>
Date:   Mon Nov 23 11:46:33 2020 +0100

r600/sfn: Lower tess-eval IO

Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7715>

---

 src/gallium/drivers/r600/sfn/sfn_nir.cpp              |  2 ++
 src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.cpp | 10 ++++++++++
 src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.h   |  1 +
 3 files changed, 13 insertions(+)

diff --git a/src/gallium/drivers/r600/sfn/sfn_nir.cpp b/src/gallium/drivers/r600/sfn/sfn_nir.cpp
index 4e8fd2bcab6..030a07a8db9 100644
--- a/src/gallium/drivers/r600/sfn/sfn_nir.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_nir.cpp
@@ -851,6 +851,8 @@ int r600_shader_from_nir(struct r600_context *rctx,
        sel->nir->info.stage == MESA_SHADER_TESS_EVAL) {
       NIR_PASS_V(sel->nir, nir_lower_io, nir_var_shader_in, r600_glsl_type_size,
                  nir_lower_io_lower_64bit_to_32);
+      NIR_PASS_V(sel->nir, nir_lower_io, nir_var_shader_out, r600_glsl_type_size,
+                 nir_lower_io_lower_64bit_to_32);
    }
 
    if (sel->nir->info.stage == MESA_SHADER_TESS_CTRL ||
diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.cpp b/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.cpp
index 9e5ce57b309..8ec3f289a79 100644
--- a/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.cpp
@@ -60,12 +60,20 @@ bool TEvalShaderFromNir::scan_sysvalue_access(nir_instr *instr)
    case nir_intrinsic_load_tcs_rel_patch_id_r600:
       m_sv_values.set(es_rel_patch_id);
       break;
+   case nir_intrinsic_store_output:
+      m_export_processor->scan_store_output(ir);
+      break;
    default:
       ;
    }
    return true;
 }
 
+void TEvalShaderFromNir::emit_shader_start()
+{
+   m_export_processor->emit_shader_start();
+}
+
 bool TEvalShaderFromNir::do_allocate_reserved_registers()
 {
    if (m_sv_values.test(es_tess_coord)) {
@@ -120,6 +128,8 @@ bool TEvalShaderFromNir::emit_intrinsic_instruction_override(nir_intrinsic_instr
       return load_preloaded_value(instr->dest, 0, m_primitive_id);
    case nir_intrinsic_load_tcs_rel_patch_id_r600:
       return load_preloaded_value(instr->dest, 0, m_rel_patch_id);
+   case nir_intrinsic_store_output:
+      return m_export_processor->store_output(instr);
    default:
       return false;
    }
diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.h b/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.h
index a33dbfa6f76..dedeccec2e1 100644
--- a/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.h
+++ b/src/gallium/drivers/r600/sfn/sfn_shader_tess_eval.h
@@ -15,6 +15,7 @@ public:
         bool scan_sysvalue_access(nir_instr *instr) override;
         PValue primitive_id() override {return m_primitive_id;}
      private:
+        void emit_shader_start() override;
         bool do_allocate_reserved_registers() override;
         bool emit_intrinsic_instruction_override(nir_intrinsic_instr* instr) override;
         bool emit_load_tess_coord(nir_intrinsic_instr* instr);