Mesa (master): spirv: add and use a generator id enum

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Mon Oct 12 11:29:03 UTC 2020


Module: Mesa
Branch: master
Commit: 18f9fc919e1b5e7511cc3085dd990b7ca037f38e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=18f9fc919e1b5e7511cc3085dd990b7ca037f38e

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Thu Oct  8 15:30:44 2020 +0100

spirv: add and use a generator id enum

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>

---

 src/compiler/nir/meson.build              |   2 +-
 src/compiler/spirv/meson.build            |   7 ++
 src/compiler/spirv/spir-v.xml             | 203 ++++++++++++++++++++++++++++++
 src/compiler/spirv/spirv_to_nir.c         |   4 +-
 src/compiler/spirv/vtn_generator_ids_h.py |  63 ++++++++++
 src/compiler/spirv/vtn_private.h          |   1 +
 6 files changed, 278 insertions(+), 2 deletions(-)

diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
index 28b372b65fe..3e578732e8b 100644
--- a/src/compiler/nir/meson.build
+++ b/src/compiler/nir/meson.build
@@ -321,7 +321,7 @@ _libnir = static_library(
   'nir',
   [files_libnir, spirv_info_c, nir_opt_algebraic_c, nir_opcodes_c,
    nir_opcodes_h, nir_constant_expressions_c, nir_builder_opcodes_h,
-   vtn_gather_types_c, nir_intrinsics_c, nir_intrinsics_h],
+   vtn_gather_types_c, nir_intrinsics_c, nir_intrinsics_h, vtn_generator_ids_h],
   include_directories : [inc_include, inc_src, inc_mapi, inc_mesa, inc_gallium, inc_gallium_aux, inc_compiler, include_directories('../spirv')],
   c_args : [c_msvc_compat_args, no_override_init_args, _libnir_args],
   gnu_symbol_visibility : 'hidden',
diff --git a/src/compiler/spirv/meson.build b/src/compiler/spirv/meson.build
index c91d12a27d9..e3dd847883a 100644
--- a/src/compiler/spirv/meson.build
+++ b/src/compiler/spirv/meson.build
@@ -31,3 +31,10 @@ spirv_info_c = custom_target(
   output : 'spirv_info.c',
   command : [prog_python, '@INPUT0@', '@INPUT1@', '@OUTPUT@'],
 )
+
+vtn_generator_ids_h = custom_target(
+  'vtn_generator_ids.h',
+  input : files('vtn_generator_ids_h.py', 'spir-v.xml'),
+  output : 'vtn_generator_ids.h',
+  command : [prog_python, '@INPUT0@', '@INPUT1@', '@OUTPUT@'],
+)
diff --git a/src/compiler/spirv/spir-v.xml b/src/compiler/spirv/spir-v.xml
new file mode 100644
index 00000000000..84aae2746ee
--- /dev/null
+++ b/src/compiler/spirv/spir-v.xml
@@ -0,0 +1,203 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<registry>
+    <!--
+    Copyright (c) 2015 The Khronos Group Inc.
+
+    Permission is hereby granted, free of charge, to any person obtaining a
+    copy of this software and/or associated documentation files (the
+    "Materials"), to deal in the Materials without restriction, including
+    without limitation the rights to use, copy, modify, merge, publish,
+    distribute, sublicense, and/or sell copies of the Materials, and to
+    permit persons to whom the Materials are furnished to do so, subject to
+    the following conditions:
+
+    The above copyright notice and this permission notice shall be included
+    in all copies or substantial portions of the Materials.
+
+    THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+    EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+    IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+    CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+    TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+    MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+    -->
+    <!--
+    This file, spir-v.xml, is the SPIR-V Tool ID, opcode and enumerant registry.
+    The canonical version of the registry, together with related schema and
+    documentation, can be found in the Khronos Registry at
+    include/spirv/spir-v.xml in the master branch at
+    https://github.com/KhronosGroup/SPIRV-Headers
+    -->
+
+    <!-- SECTION: SPIR-V Tool ID Definitions  -->
+
+    <!-- A SPIR-V Generator Magic Number is a 32 bit word: The high order 16
+         bits are a tool ID, which should be unique across all SPIR-V
+         generators. The low order 16 bits are reserved for use as a tool
+         version number, or any other purpose the tool supplier chooses.
+         Only the tool IDs are reserved with Khronos.
+
+         Add new tool ID reservations contiguously with the first available
+         number (the "start" attribute of the <unused> tag below), and
+         modify that <unused> tag accordingly. Please add a vendor/tool
+         supplier name in a 'vendor="name"' attribute; a tool name in a
+         'tool="name"' attribute; and a contact person/address in a
+         'comment' attribute. Remember that this value is the high 16 bits
+         of a 32-bit word.
+
+         Note: a single vendor/tool supplier may have multiple tool IDs
+         reserved for different SPIR-V generators -->
+
+    <ids type="vendor" start="0" end="0xFFFF" comment="SPIR-V Tool IDs">
+        <id value="0"   vendor="Khronos"    comment="Reserved by Khronos"/>
+        <id value="1"   vendor="LunarG"     comment="Contact TBD"/>
+        <id value="2"   vendor="Valve"      comment="Contact TBD"/>
+        <id value="3"   vendor="Codeplay"   comment="Contact Victor Lomuller, victor at codeplay.com"/>
+        <id value="4"   vendor="NVIDIA"     comment="Contact Kerch Holt, kholt at nvidia.com"/>
+        <id value="5"   vendor="ARM"        comment="Contact Alexander Galazin, alexander.galazin at arm.com"/>
+        <id value="6"   vendor="Khronos" tool="LLVM/SPIR-V Translator" comment="Contact Yaxun (Sam) Liu, yaxun.liu at amd.com"/>
+        <id value="7"   vendor="Khronos" tool="SPIR-V Tools Assembler" comment="Contact David Neto, dneto at google.com"/>
+        <id value="8"   vendor="Khronos" tool="Glslang Reference Front End" comment="Contact John Kessenich, johnkessenich at google.com"/>
+        <id value="9"   vendor="Qualcomm"   comment="Contact weifengz at qti.qualcomm.com"/>
+        <id value="10"  vendor="AMD"        comment="Contact Daniel Rakos, daniel.rakos at amd.com"/>
+        <id value="11"  vendor="Intel"      comment="Contact Alexey, alexey.bader at intel.com"/>
+        <id value="12"  vendor="Imagination" comment="Contact James Jones"/>
+        <id value="13"  vendor="Google" tool="Shaderc over Glslang" comment="Contact David Neto, dneto at google.com"/>
+        <id value="14"  vendor="Google" tool="spiregg" comment="Contact Lei Zhang, antiagainst at google.com"/>
+        <id value="15"  vendor="Google" tool="rspirv" comment="Contact Lei Zhang, antiagainst at gmail.com"/>
+        <id value="16"  vendor="X-LEGEND"   tool="Mesa-IR/SPIR-V Translator" comment="Contact Metora Wang, github:metora/MesaGLSLCompiler"/>
+        <id value="17"  vendor="Khronos" tool="SPIR-V Tools Linker" comment="Contact David Neto, dneto at google.com"/>
+        <id value="18"  vendor="Wine" tool="VKD3D Shader Compiler" comment="Contact wine-devel at winehq.org"/>
+        <id value="19"  vendor="Clay" tool="Clay Shader Compiler" comment="Contact info at clayengine.com"/>
+        <id value="20"  vendor="W3C WebGPU Group" tool="WHLSL Shader Translator" comment="https://github.com/gpuweb/WHLSL"/>
+        <id value="21"  vendor="Google" tool="Clspv" comment="Contact David Neto, dneto at google.com"/>
+        <id value="22"  vendor="Google" tool="MLIR SPIR-V Serializer" comment="Contact Lei Zhang, antiagainst at google.com"/>
+        <id value="23"  vendor="Google" tool="Tint Compiler" comment="Contact David Neto, dneto at google.com"/>
+        <id value="24"  vendor="Google" tool="ANGLE Shader Compiler" comment="Contact Shahbaz Youssefi, syoussefi at google.com"/>
+        <id value="25"  vendor="Netease Games" tool="Messiah Shader Compiler" comment="Contact Yuwen Wu, atyuwen at gmail.com"/>
+        <unused start="26" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
+    </ids>
+
+    <!-- SECTION: SPIR-V Opcodes and Enumerants -->
+
+    <!-- Vendors reserve new ranges of:
+           - opcode enumerants in the "opcode" list below, and
+           - non-opcode enumerants in the non-opcodes "enumerant" list below.
+         Both are reserved by contiguous blocks of 64, preceding the given
+         "Future use" blocks.
+
+         SPIR-V background:
+           - SPIR-V currently has well over 30 enums, including the opcode enum
+           - each enum has its own name space, allowing reuse of enumerants
+           - SPIR-V restricts opcode enumerants to 16 bits
+           - all other enums use 32-bit enumerants
+
+         Reservation rules:
+           - opcode reservations ("opcode") are only valid for opcodes
+           - non-opcode reservations ("enumerant") are not valid for opcodes
+           - reservations in the enumerant list are valid for all non-opcode enums
+           - it is simpler to use each non-opcode enumerant for only one purpose
+             but this is left to the discretion of the vendor
+           - all enumerants in a range should be used before allocating a new range
+             (several extensions can use enumerants from the same range)
+
+         Each vendor determines the use of enumerants in the ranges they
+         reserve. Vendors are not required to disclose those uses.  If the use
+         of an enumerant is included in an extension that is adopted by a Khronos
+         extension or specification, then that enumerant's use may be permanently
+         fixed as if originally reserved in a Khronos range.
+
+         -->
+
+    <!-- Begin reservations of opcode enumerants -->
+    <ids type="opcode" start="0" end="4095" vendor="Khronos" comment="Reserved opcodes, not available to vendors - see the SPIR-V Specification"/>
+    <ids type="opcode" start="4096" end="4159" vendor="Mesa" comment="Contact TBD"/>
+    <ids type="opcode" start="4160" end="4415" vendor="ARM"/>
+    <ids type="opcode" start="4416" end="4479" vendor="Khronos" comment="SPV_ARB_shader_ballot - contact Neil Henning, neil.henning at amd.com"/>
+    <ids type="opcode" start="4480" end="4991" vendor="Qualcomm" comment="Contact weifengz at qti.qualcomm.com"/>
+    <ids type="opcode" start="4992" end="5247" vendor="AMD"/>
+    <ids type="opcode" start="5248" end="5503" vendor="NVIDIA"/>
+    <ids type="opcode" start="5504" end="5567" vendor="Imagination"/>
+    <ids type="opcode" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh at intel.com"/>
+    <ids type="opcode" start="5632" end="5695" vendor="Google" comment="Contact dneto at google.com"/>
+    <ids type="opcode" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh at intel.com"/>
+    <ids type="opcode" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner at intel.com"/>
+    <ids type="opcode" start="5952" end="6015" vendor="Codeplay" comment="Contact victor at codeplay.com"/>
+    <ids type="opcode" start="6016" end="6079" vendor="Khronos" comment="Contact @tobski"/>
+    <ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki at intel.com"/>
+    <!-- Opcode enumerants to reserve for future use. To get a block, allocate
+         multiples of 64 starting at the lowest available point in this
+         block and add a corresponding <ids> tag immediately above. Make
+         sure to fill in the vendor attribute, and preferably add a contact
+         person/address in a comment attribute. -->
+    <!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
+    <ids type="opcode" start="6144" end="65535" comment="Opcode range reservable for future use by vendors"/>
+    <!-- End reservations of opcodes -->
+
+
+    <!-- Begin reservations of non-opcode enumerants -->
+    <ids type="enumerant" start="0" end="4095" vendor="Khronos" comment="Reserved enumerants, not available to vendors - see the SPIR-V Specification"/>
+    <ids type="enumerant" start="4096" end="4159" vendor="Mesa" comment="Contact TBD"/>
+    <ids type="enumerant" start="4160" end="4415" vendor="ARM"/>
+    <ids type="enumerant" start="4416" end="4479" vendor="Khronos" comment="SPV_ARB_shader_ballot - contact Neil Henning, neil.henning at amd.com"/>
+    <ids type="enumerant" start="4480" end="4991" vendor="Qualcomm" comment="Contact weifengz at qti.qualcomm.com"/>
+    <ids type="enumerant" start="4992" end="5247" vendor="AMD"/>
+    <ids type="enumerant" start="5248" end="5503" vendor="NVIDIA"/>
+    <ids type="enumerant" start="5504" end="5567" vendor="Imagination"/>
+    <ids type="enumerant" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh at intel.com"/>
+    <ids type="enumerant" start="5632" end="5695" vendor="Google" comment="Contact dneto at google.com"/>
+    <ids type="enumerant" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh at intel.com"/>
+    <ids type="enumerant" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner at intel.com"/>
+    <ids type="enumerant" start="5952" end="6015" vendor="Codeplay" comment="Contact victor at codeplay.com"/>
+    <ids type="enumerant" start="6016" end="6079" vendor="Khronos" comment="Contact @tobski"/>
+    <ids type="enumerant" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki at intel.com"/>
+    <!-- Enumerants to reserve for future use. To get a block, allocate
+         multiples of 64 starting at the lowest available point in this
+         block and add a corresponding <ids> tag immediately above. Make
+         sure to fill in the vendor attribute, and preferably add a contact
+         person/address in a comment attribute. -->
+    <!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
+    <ids type="enumerant" start="6144" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
+    <!-- End reservations of enumerants -->
+
+
+    <!-- SECTION: SPIR-V Loop Control Bit Reservations -->
+    <!-- Reserve ranges of bits in the loop control bitfield.
+
+         Each vendor determines the use of values in their own ranges.
+         Vendors are not required to disclose those uses.  If the use of a
+         value is included in an extension that is adopted by a Khronos
+         extension or specification, then that value's use may be permanently
+         fixed as if originally reserved in a Khronos range.
+
+         The SPIR Working Group strongly recommends:
+         - Each value is used for only one purpose.
+         - All values in a range should be used before allocating a new range.
+         -->
+
+    <!-- Reserved loop control bits -->
+    <ids type="LoopControl" start="0" end="15" vendor="Khronos" comment="Reserved LoopControl bits, not available to vendors - see the SPIR-V Specification"/>
+    <ids type="LoopControl" start="16" end="22" vendor="Intel" comment="Contact michael.kinsner at intel.com"/>
+    <ids type="LoopControl" start="23" end="30" comment="Unreserved bits reservable for use by vendors"/>
+    <ids type="LoopControl" start="31" end="31" vendor="Khronos" comment="Reserved LoopControl bit, not available to vendors"/>
+
+
+    <!-- SECTION: SPIR-V FP Fast Math Mode Bit Reservations -->
+    <!-- Reserve ranges of bits in the "FP Fast Math Mode" bitfield.
+         Each vendor determines the use of values in their own ranges.
+         Vendors are not required to disclose those uses.  If the use of a
+         value is included in an extension that is adopted by a Khronos
+         extension or specification, then that value's use may be permanently
+         fixed as if originally reserved in a Khronos range.
+         The SPIR Working Group strongly recommends:
+         - Each value is used for only one purpose.
+         - All values in a range should be used before allocating a new range.
+         -->
+
+    <!-- Reserved FP fast math mode bits -->
+    <ids type="FPFastMathMode" start="0" end="15" vendor="Khronos" comment="Reserved FPFastMathMode bits, not available to vendors - see the SPIR-V Specification"/>
+    <ids type="FPFastMathMode" start="16" end="17" vendor="Intel" comment="Contact michael.kinsner at intel.com"/>
+    <ids type="FPFastMathMode" start="18" end="31" comment="Unreserved bits reservable for use by vendors"/>
+
+</registry>
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 0c1ac862182..f236804cca7 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -5456,7 +5456,9 @@ vtn_create_builder(const uint32_t *words, size_t word_count,
     * commands.  Prior to that, we need to fix them up ourselves.  This
     * GLSLang fix caused them to bump to generator version 3.
     */
-   b->wa_glslang_cs_barrier = (generator_id == 8 && generator_version < 3);
+   b->wa_glslang_cs_barrier =
+      (generator_id == vtn_generator_glslang_reference_front_end &&
+       generator_version < 3);
 
    /* words[2] == generator magic */
    unsigned value_id_bound = words[3];
diff --git a/src/compiler/spirv/vtn_generator_ids_h.py b/src/compiler/spirv/vtn_generator_ids_h.py
new file mode 100644
index 00000000000..098c7d80d85
--- /dev/null
+++ b/src/compiler/spirv/vtn_generator_ids_h.py
@@ -0,0 +1,63 @@
+COPYRIGHT = """\
+/*
+ * Copyright © 2020 Valve Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+"""
+
+import argparse
+import xml.etree.ElementTree as ET
+from mako.template import Template
+
+TEMPLATE  = Template("""\
+/* DO NOT EDIT - This file is generated automatically by vtn_generator_ids.py script */
+
+""" + COPYRIGHT + """\
+<%
+def get_name(generator):
+    name = generator.get('tool').lower()
+    name = name.replace('-', '')
+    name = name.replace(' ', '_')
+    name = name.replace('/', '_')
+    return name
+%>
+enum vtn_generator {
+% for generator in root.find("./ids[@type='vendor']").findall('id'):
+% if 'tool' in generator.attrib:
+   vtn_generator_${get_name(generator)} = ${generator.get('value')},
+% endif
+% endfor
+   vtn_generator_max = 0xffff,
+};
+""")
+
+if __name__ == "__main__":
+    p = argparse.ArgumentParser()
+    p.add_argument("xml")
+    p.add_argument("out")
+    pargs = p.parse_args()
+
+    tree = ET.parse(pargs.xml)
+    root = tree.getroot()
+
+    with open(pargs.out, 'w') as f:
+        f.write(TEMPLATE.render(root=root))
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index f5f4ce8a9bb..a51a2bebde2 100644
--- a/src/compiler/spirv/vtn_private.h
+++ b/src/compiler/spirv/vtn_private.h
@@ -35,6 +35,7 @@
 #include "util/u_dynarray.h"
 #include "nir_spirv.h"
 #include "spirv.h"
+#include "vtn_generator_ids.h"
 
 struct vtn_builder;
 struct vtn_decoration;



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