Mesa (master): i965: Rename gen10_emit_isp_disable to gen7_emit_isp_disable
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Thu Oct 15 16:45:10 UTC 2020
Module: Mesa
Branch: master
Commit: 112f23fd332039879c19ebe0ce9e0b96e0dd0191
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=112f23fd332039879c19ebe0ce9e0b96e0dd0191
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Thu Sep 24 11:49:13 2020 -0700
i965: Rename gen10_emit_isp_disable to gen7_emit_isp_disable
It's used on Gen7+, and there's nothing Gen10-specific about it.
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>
---
src/mesa/drivers/dri/i965/brw_pipe_control.c | 2 +-
src/mesa/drivers/dri/i965/brw_pipe_control.h | 2 +-
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index 257ac748ada..20cb24c71fc 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -166,7 +166,7 @@ gen7_emit_vs_workaround_flush(struct brw_context *brw)
* so that it doesn't hang a previous 3DPRIMITIVE.
*/
void
-gen10_emit_isp_disable(struct brw_context *brw)
+gen7_emit_isp_disable(struct brw_context *brw)
{
brw->vtbl.emit_raw_pipe_control(brw,
PIPE_CONTROL_STALL_AT_SCOREBOARD |
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.h b/src/mesa/drivers/dri/i965/brw_pipe_control.h
index e213f43a4f7..7998281b3b7 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.h
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.h
@@ -90,6 +90,6 @@ void brw_emit_post_sync_nonzero_flush(struct brw_context *brw);
void brw_emit_depth_stall_flushes(struct brw_context *brw);
void gen7_emit_vs_workaround_flush(struct brw_context *brw);
void gen7_emit_cs_stall_flush(struct brw_context *brw);
-void gen10_emit_isp_disable(struct brw_context *brw);
+void gen7_emit_isp_disable(struct brw_context *brw);
#endif
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index a4a30e816b2..4e039c70a26 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -644,7 +644,7 @@ brw_finish_batch(struct brw_context *brw)
/* Do not restore push constant packets during context restore. */
if (devinfo->gen >= 7)
- gen10_emit_isp_disable(brw);
+ gen7_emit_isp_disable(brw);
/* Emit MI_BATCH_BUFFER_END to finish our batch. Note that execbuf2
* requires our batch size to be QWord aligned, so we pad it out if
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