Mesa (master): nir: use enum operator helper for nir_variable_mode and nir_metadata
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Tue Sep 1 18:00:11 UTC 2020
Module: Mesa
Branch: master
Commit: 70cbddc4a7967c8889f8b10d8a31d7b8bdbde2fb
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70cbddc4a7967c8889f8b10d8a31d7b8bdbde2fb
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Aug 31 18:08:49 2020 +0200
nir: use enum operator helper for nir_variable_mode and nir_metadata
those are used quite a bit
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6520>
---
.../compiler/aco_instruction_selection_setup.cpp | 21 ++++++++++-----------
src/compiler/nir/nir.h | 3 +++
.../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 3 +--
src/gallium/drivers/r600/sfn/sfn_nir.cpp | 3 +--
.../r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp | 4 +---
src/gallium/frontends/clover/nir/invocation.cpp | 3 +--
src/intel/compiler/brw_fs.cpp | 10 ++++------
src/mesa/state_tracker/st_glsl_to_nir.cpp | 12 +++++-------
8 files changed, 26 insertions(+), 33 deletions(-)
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp
index 53f7ced4bf5..73bc1e151df 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -205,8 +205,7 @@ sanitize_if(nir_function_impl *impl, nir_if *nif)
* correct because of the specific type of transformation we did. Block
* indices are not valid except for block_0's, which is all we care about for
* nir_block_is_unreachable(). */
- impl->valid_metadata =
- (nir_metadata)(impl->valid_metadata | nir_metadata_dominance | nir_metadata_block_index);
+ impl->valid_metadata = impl->valid_metadata | nir_metadata_dominance | nir_metadata_block_index;
return true;
}
@@ -568,7 +567,7 @@ void init_context(isel_context *ctx, nir_shader *shader)
/* sanitize control flow */
nir_metadata_require(impl, nir_metadata_dominance);
sanitize_cf_list(impl, &impl->body);
- nir_metadata_preserve(impl, (nir_metadata)~nir_metadata_block_index);
+ nir_metadata_preserve(impl, ~nir_metadata_block_index);
/* we'll need this for isel */
nir_metadata_require(impl, nir_metadata_block_index);
@@ -1323,22 +1322,22 @@ setup_nir(isel_context *ctx, nir_shader *nir)
nir_variable_mode robust_modes = (nir_variable_mode)0;
if (ctx->options->robust_buffer_access) {
- robust_modes = (nir_variable_mode)(nir_var_mem_ubo |
- nir_var_mem_ssbo |
- nir_var_mem_global |
- nir_var_mem_push_const);
+ robust_modes = nir_var_mem_ubo |
+ nir_var_mem_ssbo |
+ nir_var_mem_global |
+ nir_var_mem_push_const;
}
if (nir_opt_load_store_vectorize(nir,
- (nir_variable_mode)(nir_var_mem_ssbo | nir_var_mem_ubo |
- nir_var_mem_push_const | nir_var_mem_shared |
- nir_var_mem_global),
+ nir_var_mem_ssbo | nir_var_mem_ubo |
+ nir_var_mem_push_const | nir_var_mem_shared |
+ nir_var_mem_global,
mem_vectorize_callback, robust_modes)) {
lower_to_scalar = true;
lower_pack = true;
}
if (nir->info.stage != MESA_SHADER_COMPUTE)
- nir_lower_io(nir, (nir_variable_mode)(nir_var_shader_in | nir_var_shader_out), type_size, (nir_lower_io_options)0);
+ nir_lower_io(nir, nir_var_shader_in | nir_var_shader_out, type_size, (nir_lower_io_options)0);
lower_to_scalar |= nir_opt_shrink_vectors(nir);
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index e6edb72ecf2..ecd806523b3 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -36,6 +36,7 @@
#include "util/set.h"
#include "util/bitscan.h"
#include "util/bitset.h"
+#include "util/enum_operators.h"
#include "util/macros.h"
#include "util/format/u_format.h"
#include "compiler/nir_types.h"
@@ -123,6 +124,7 @@ typedef enum {
nir_num_variable_modes = 11,
nir_var_all = (1 << nir_num_variable_modes) - 1,
} nir_variable_mode;
+MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_variable_mode)
/**
* Rounding modes.
@@ -2818,6 +2820,7 @@ typedef enum {
*/
nir_metadata_all = ~nir_metadata_not_properly_reset,
} nir_metadata;
+MESA_DEFINE_CPP_ENUM_BITFIELD_OPERATORS(nir_metadata)
typedef struct {
nir_cf_node cf_node;
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index b8c77112c01..08bbaaed5df 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -3122,8 +3122,7 @@ Converter::run()
NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_function_temp, nir_address_format_32bit_offset);
NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
- NIR_PASS_V(nir, nir_lower_io,
- (nir_variable_mode)(nir_var_shader_in | nir_var_shader_out),
+ NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
type_size, (nir_lower_io_options)0);
NIR_PASS_V(nir, nir_lower_subgroups, &subgroup_options);
diff --git a/src/gallium/drivers/r600/sfn/sfn_nir.cpp b/src/gallium/drivers/r600/sfn/sfn_nir.cpp
index d7bf09eb46f..cbaaa7eb147 100644
--- a/src/gallium/drivers/r600/sfn/sfn_nir.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_nir.cpp
@@ -636,8 +636,7 @@ r600_nir_lower_atomics(nir_shader *shader)
}
if (impl_progress) {
- nir_metadata_preserve(function->impl, (nir_metadata)(nir_metadata_block_index |
- nir_metadata_dominance));
+ nir_metadata_preserve(function->impl, nir_metadata_block_index | nir_metadata_dominance);
progress = true;
}
}
diff --git a/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp b/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp
index f45a490c895..e97c6a60b3e 100644
--- a/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_nir_lower_fs_out_to_vector.cpp
@@ -141,9 +141,7 @@ bool NirLowerIOToVector::run(nir_function_impl *impl)
bool progress = vectorize_block(&b, nir_start_block(impl));
if (progress) {
- nir_metadata_preserve(impl, (nir_metadata )
- (nir_metadata_block_index |
- nir_metadata_dominance));
+ nir_metadata_preserve(impl, nir_metadata_block_index | nir_metadata_dominance);
}
return progress;
}
diff --git a/src/gallium/frontends/clover/nir/invocation.cpp b/src/gallium/frontends/clover/nir/invocation.cpp
index 757ace61393..8d53f594c44 100644
--- a/src/gallium/frontends/clover/nir/invocation.cpp
+++ b/src/gallium/frontends/clover/nir/invocation.cpp
@@ -201,8 +201,7 @@ module clover::nir::spirv_to_nir(const module &mod, const device &dev,
nir_validate_shader(nir, "clover after function inlining");
- NIR_PASS_V(nir, nir_lower_variable_initializers,
- static_cast<nir_variable_mode>(~nir_var_function_temp));
+ NIR_PASS_V(nir, nir_lower_variable_initializers, ~nir_var_function_temp);
// copy propagate to prepare for lower_explicit_io
NIR_PASS_V(nir, nir_split_var_copies);
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 2cf05a2fdfb..388fd8dec28 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -8450,9 +8450,8 @@ brw_nir_move_interpolation_to_top(nir_shader *nir)
}
}
}
- nir_metadata_preserve(f->impl, (nir_metadata)
- ((unsigned) nir_metadata_block_index |
- (unsigned) nir_metadata_dominance));
+ nir_metadata_preserve(f->impl, nir_metadata_block_index |
+ nir_metadata_dominance);
}
return progress;
@@ -8496,9 +8495,8 @@ brw_nir_demote_sample_qualifiers(nir_shader *nir)
}
}
- nir_metadata_preserve(f->impl, (nir_metadata)
- ((unsigned) nir_metadata_block_index |
- (unsigned) nir_metadata_dominance));
+ nir_metadata_preserve(f->impl, nir_metadata_block_index |
+ nir_metadata_dominance);
}
return progress;
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 12e711936ea..6e5df53ea1f 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -264,9 +264,8 @@ st_nir_opts(nir_shader *nir)
* might be able to make progress after it.
*/
NIR_PASS(progress, nir, nir_remove_dead_variables,
- (nir_variable_mode)(nir_var_function_temp |
- nir_var_shader_temp |
- nir_var_mem_shared),
+ nir_var_function_temp | nir_var_shader_temp |
+ nir_var_mem_shared,
NULL);
NIR_PASS(progress, nir, nir_opt_copy_prop_vars);
@@ -383,8 +382,7 @@ st_nir_preprocess(struct st_context *st, struct gl_program *prog,
* calls below do a little extra work but should otherwise have no impact.
*/
if (!_mesa_is_gles(st->ctx) || !nir->info.separate_shader) {
- nir_variable_mode mask =
- (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
+ nir_variable_mode mask = nir_var_shader_in | nir_var_shader_out;
nir_remove_dead_variables(nir, mask, NULL);
}
@@ -508,8 +506,8 @@ st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
st_nir_opts(nir);
}
- nir_variable_mode mask = (nir_variable_mode)
- (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp );
+ nir_variable_mode mask =
+ nir_var_shader_in | nir_var_shader_out | nir_var_function_temp;
nir_remove_dead_variables(nir, mask, NULL);
if (!st->has_hw_atomics && !screen->get_param(screen, PIPE_CAP_NIR_ATOMICS_AS_DEREF))
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