Mesa (master): intel/assembler: Add labels support

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 03fbff1efcccc0e09fc218c24b29e6d1ad4d4599
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=03fbff1efcccc0e09fc218c24b29e6d1ad4d4599

Author: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Date:   Thu Jun 13 17:26:02 2019 +0300

intel/assembler: Add labels support

Use labels instead of numeric JIP/UIP offsets.
Works for gen6+.

v2:
 - Change asm tests to use labels on gen6+
 - Remove usage of relative offsets on gen6+
 - Consider brw_jump_scale when setting relative offset
 - Return error if there is a JIP/UIP label without matching target
 - Fix matching of label tokens

Signed-off-by: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4245>

---

 src/intel/tools/i965_asm.c                  |  92 +++++++
 src/intel/tools/i965_asm.h                  |  24 ++
 src/intel/tools/i965_gram.y                 | 356 +++++++++++++++++-----------
 src/intel/tools/i965_lex.l                  |  20 +-
 src/intel/tools/tests/gen6/break.asm        |  15 +-
 src/intel/tools/tests/gen6/break.expected   |  12 +-
 src/intel/tools/tests/gen6/cont.asm         |   9 +-
 src/intel/tools/tests/gen6/cont.expected    |   6 +-
 src/intel/tools/tests/gen6/else.asm         |   7 +-
 src/intel/tools/tests/gen6/else.expected    |   6 +-
 src/intel/tools/tests/gen6/endif.asm        |   9 +-
 src/intel/tools/tests/gen6/halt.asm         |  10 +-
 src/intel/tools/tests/gen6/halt.expected    |   4 +-
 src/intel/tools/tests/gen6/if.asm           |  14 +-
 src/intel/tools/tests/gen6/if.expected      |  12 +-
 src/intel/tools/tests/gen6/while.asm        |  13 +-
 src/intel/tools/tests/gen6/while.expected   |  12 +-
 src/intel/tools/tests/gen7.5/break.asm      |  14 +-
 src/intel/tools/tests/gen7.5/break.expected |  12 +-
 src/intel/tools/tests/gen7.5/cont.asm       |   9 +-
 src/intel/tools/tests/gen7.5/cont.expected  |   6 +-
 src/intel/tools/tests/gen7.5/else.asm       |   7 +-
 src/intel/tools/tests/gen7.5/else.expected  |   6 +-
 src/intel/tools/tests/gen7.5/endif.asm      |   8 +-
 src/intel/tools/tests/gen7.5/endif.expected |   4 +-
 src/intel/tools/tests/gen7.5/halt.asm       |  10 +-
 src/intel/tools/tests/gen7.5/halt.expected  |   4 +-
 src/intel/tools/tests/gen7.5/if.asm         |  15 +-
 src/intel/tools/tests/gen7.5/if.expected    |  12 +-
 src/intel/tools/tests/gen7.5/while.asm      |  13 +-
 src/intel/tools/tests/gen7.5/while.expected |  12 +-
 src/intel/tools/tests/gen7/break.asm        |  15 +-
 src/intel/tools/tests/gen7/break.expected   |  12 +-
 src/intel/tools/tests/gen7/else.asm         |   7 +-
 src/intel/tools/tests/gen7/else.expected    |   6 +-
 src/intel/tools/tests/gen7/endif.asm        |   9 +-
 src/intel/tools/tests/gen7/halt.asm         |  10 +-
 src/intel/tools/tests/gen7/halt.expected    |   4 +-
 src/intel/tools/tests/gen7/if.asm           |  15 +-
 src/intel/tools/tests/gen7/if.expected      |  12 +-
 src/intel/tools/tests/gen7/while.asm        |  11 +-
 src/intel/tools/tests/gen7/while.expected   |  10 +-
 src/intel/tools/tests/gen8/break.asm        |  10 +-
 src/intel/tools/tests/gen8/break.expected   |   8 +-
 src/intel/tools/tests/gen8/cont.asm         |   6 +-
 src/intel/tools/tests/gen8/cont.expected    |   4 +-
 src/intel/tools/tests/gen8/else.asm         |   7 +-
 src/intel/tools/tests/gen8/else.expected    |   6 +-
 src/intel/tools/tests/gen8/endif.asm        |   7 +-
 src/intel/tools/tests/gen8/endif.expected   |   4 +-
 src/intel/tools/tests/gen8/halt.asm         |  10 +-
 src/intel/tools/tests/gen8/halt.expected    |   4 +-
 src/intel/tools/tests/gen8/if.asm           |  12 +-
 src/intel/tools/tests/gen8/if.expected      |  10 +-
 src/intel/tools/tests/gen8/while.asm        |   9 +-
 src/intel/tools/tests/gen8/while.expected   |   8 +-
 src/intel/tools/tests/gen9/break.asm        |  10 +-
 src/intel/tools/tests/gen9/break.expected   |   8 +-
 src/intel/tools/tests/gen9/cont.asm         |   6 +-
 src/intel/tools/tests/gen9/cont.expected    |   4 +-
 src/intel/tools/tests/gen9/else.asm         |   7 +-
 src/intel/tools/tests/gen9/else.expected    |   6 +-
 src/intel/tools/tests/gen9/endif.asm        |   7 +-
 src/intel/tools/tests/gen9/endif.expected   |   4 +-
 src/intel/tools/tests/gen9/halt.asm         |  10 +-
 src/intel/tools/tests/gen9/halt.expected    |   4 +-
 src/intel/tools/tests/gen9/if.asm           |  12 +-
 src/intel/tools/tests/gen9/if.expected      |  10 +-
 src/intel/tools/tests/gen9/while.asm        |   9 +-
 src/intel/tools/tests/gen9/while.expected   |   8 +-
 70 files changed, 673 insertions(+), 401 deletions(-)

Diff:   http://cgit.freedesktop.org/mesa/mesa/diff/?id=03fbff1efcccc0e09fc218c24b29e6d1ad4d4599