Mesa (master): nir: get ffma support from NIR options for nir_lower_flrp
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Fri Sep 4 17:19:22 UTC 2020
Module: Mesa
Branch: master
Commit: ac55b1a9a6266b5badfee82d81302ffc38faeb42
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac55b1a9a6266b5badfee82d81302ffc38faeb42
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jul 22 22:13:16 2020 -0400
nir: get ffma support from NIR options for nir_lower_flrp
This also fixes the inverted last parameter of nir_lower_flrp in most drivers.
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>
---
.gitlab-ci/traces-radeonsi.yml | 2 +-
src/amd/vulkan/radv_shader.c | 3 +--
src/broadcom/compiler/nir_to_vir.c | 3 +--
src/compiler/nir/nir.h | 2 +-
src/compiler/nir/nir_lower_flrp.c | 16 +++++++---------
src/freedreno/ir3/ir3_nir.c | 3 +--
src/gallium/drivers/r600/r600_shader.c | 2 +-
src/gallium/drivers/radeonsi/si_shader_nir.c | 3 +--
src/gallium/drivers/vc4/vc4_program.c | 3 +--
src/gallium/frontends/vallium/val_pipeline.c | 2 +-
src/intel/compiler/brw_nir.c | 3 +--
src/mesa/state_tracker/st_glsl_to_nir.cpp | 3 +--
src/panfrost/bifrost/bifrost_compile.c | 3 +--
src/panfrost/midgard/midgard_compile.c | 3 +--
14 files changed, 20 insertions(+), 31 deletions(-)
diff --git a/.gitlab-ci/traces-radeonsi.yml b/.gitlab-ci/traces-radeonsi.yml
index f35e523385e..9e8d5dba8ad 100644
--- a/.gitlab-ci/traces-radeonsi.yml
+++ b/.gitlab-ci/traces-radeonsi.yml
@@ -173,7 +173,7 @@ traces:
- path: godot/Material Testers.x86_64_2020.04.08_13.38_frame799.rdc
expectations:
- device: gl-radeonsi-stoney
- checksum: 2ddcda6b1c136ce1448714a3ff8432eb
+ checksum: 5164e238381e7d77a64e3de771cc005f
- path: gputest/gimark.trace
expectations:
- device: gl-radeonsi-stoney
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index c76975c2252..bce321ac375 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -261,8 +261,7 @@ radv_optimize_nir(struct nir_shader *shader, bool optimize_conservatively,
shader,
nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- shader->options->lower_ffma);
+ false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, shader,
nir_opt_constant_folding);
diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c
index e580e75ef3c..1c6aeec56e5 100644
--- a/src/broadcom/compiler/nir_to_vir.c
+++ b/src/broadcom/compiler/nir_to_vir.c
@@ -1451,8 +1451,7 @@ v3d_optimize_nir(struct nir_shader *s)
NIR_PASS(lower_flrp_progress, s, nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- s->options->lower_ffma);
+ false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, s, nir_opt_constant_folding);
progress = true;
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 68576219e06..bf054e82802 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -4314,7 +4314,7 @@ void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
bool nir_lower_alu(nir_shader *shader);
bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
- bool always_precise, bool have_ffma);
+ bool always_precise);
bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
bool nir_lower_bool_to_bitsize(nir_shader *shader);
diff --git a/src/compiler/nir/nir_lower_flrp.c b/src/compiler/nir/nir_lower_flrp.c
index 38be18ecc6b..3b4d23bae11 100644
--- a/src/compiler/nir/nir_lower_flrp.c
+++ b/src/compiler/nir/nir_lower_flrp.c
@@ -364,9 +364,10 @@ static void
convert_flrp_instruction(nir_builder *bld,
struct u_vector *dead_flrp,
nir_alu_instr *alu,
- bool always_precise,
- bool have_ffma)
+ bool always_precise)
{
+ bool have_ffma = !bld->shader->options->lower_ffma;
+
bld->cursor = nir_before_instr(&alu->instr);
/* There are two methods to implement flrp(x, y, t). The strictly correct
@@ -586,8 +587,7 @@ static void
lower_flrp_impl(nir_function_impl *impl,
struct u_vector *dead_flrp,
unsigned lowering_mask,
- bool always_precise,
- bool have_ffma)
+ bool always_precise)
{
nir_builder b;
nir_builder_init(&b, impl);
@@ -599,8 +599,7 @@ lower_flrp_impl(nir_function_impl *impl,
if (alu->op == nir_op_flrp &&
(alu->dest.dest.ssa.bit_size & lowering_mask)) {
- convert_flrp_instruction(&b, dead_flrp, alu, always_precise,
- have_ffma);
+ convert_flrp_instruction(&b, dead_flrp, alu, always_precise);
}
}
}
@@ -622,8 +621,7 @@ lower_flrp_impl(nir_function_impl *impl,
bool
nir_lower_flrp(nir_shader *shader,
unsigned lowering_mask,
- bool always_precise,
- bool have_ffma)
+ bool always_precise)
{
struct u_vector dead_flrp;
@@ -633,7 +631,7 @@ nir_lower_flrp(nir_shader *shader,
nir_foreach_function(function, shader) {
if (function->impl) {
lower_flrp_impl(function->impl, &dead_flrp, lowering_mask,
- always_precise, have_ffma);
+ always_precise);
}
}
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index bd73beefac9..46c1d1cf7ba 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -185,8 +185,7 @@ ir3_optimize_loop(nir_shader *s)
if (lower_flrp != 0) {
if (OPT(s, nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- s->options->lower_ffma)) {
+ false /* always_precise */)) {
OPT(s, nir_opt_constant_folding);
progress = true;
}
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 9ac0efad7e4..f58f8ccbe8b 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -203,7 +203,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
NIR_PASS_V(sel->nir, nir_lower_int64);
NIR_PASS_V(sel->nir, nir_opt_vectorize, NULL, NULL);
}
- NIR_PASS_V(sel->nir, nir_lower_flrp, ~0, false, false);
+ NIR_PASS_V(sel->nir, nir_lower_flrp, ~0, false);
}
nir_tgsi_scan_shader(sel->nir, &sel->info, true);
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index a2f3af831ad..02fd6dfd48b 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -644,8 +644,7 @@ static void si_nir_opts(struct nir_shader *nir, bool first)
assert(lower_flrp);
bool lower_flrp_progress = false;
- NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp, lower_flrp, false /* always_precise */,
- nir->options->lower_ffma);
+ NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp, lower_flrp, false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, nir, nir_opt_constant_folding);
progress = true;
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 0d448fa2754..4f2956bb735 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1546,8 +1546,7 @@ vc4_optimize_nir(struct nir_shader *s)
NIR_PASS(lower_flrp_progress, s, nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- s->options->lower_ffma);
+ false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, s, nir_opt_constant_folding);
progress = true;
diff --git a/src/gallium/frontends/vallium/val_pipeline.c b/src/gallium/frontends/vallium/val_pipeline.c
index fb0a88a051d..a1d83902c56 100644
--- a/src/gallium/frontends/vallium/val_pipeline.c
+++ b/src/gallium/frontends/vallium/val_pipeline.c
@@ -590,7 +590,7 @@ val_shader_compile_to_ir(struct val_pipeline *pipeline,
do {
progress = false;
- progress |= OPT(nir_lower_flrp, 32|64, true, false);
+ progress |= OPT(nir_lower_flrp, 32|64, true);
progress |= OPT(nir_split_array_vars, nir_var_function_temp);
progress |= OPT(nir_shrink_vec_array_vars, nir_var_function_temp);
progress |= OPT(nir_opt_deref);
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 8cf2131ef72..d7b7551d739 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -597,8 +597,7 @@ brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
if (lower_flrp != 0) {
if (OPT(nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- compiler->devinfo->gen >= 6)) {
+ false /* always_precise */)) {
OPT(nir_opt_constant_folding);
}
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 6e5df53ea1f..089a134cf1e 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -305,8 +305,7 @@ st_nir_opts(nir_shader *nir)
NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- nir->options->lower_ffma);
+ false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, nir,
nir_opt_constant_folding);
diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index 39f9b658040..413c8d3f2c8 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -1272,8 +1272,7 @@ bi_optimize_nir(nir_shader *nir)
nir,
nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- nir->options->lower_ffma);
+ false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, nir,
nir_opt_constant_folding);
diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index bd13efd0eca..415000b9825 100644
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -536,8 +536,7 @@ optimise_nir(nir_shader *nir, unsigned quirks, bool is_blend)
nir,
nir_lower_flrp,
lower_flrp,
- false /* always_precise */,
- nir->options->lower_ffma);
+ false /* always_precise */);
if (lower_flrp_progress) {
NIR_PASS(progress, nir,
nir_opt_constant_folding);
More information about the mesa-commit
mailing list