Mesa (staging/20.1): nir: More NIR_MAX_VEC_COMPONENTS fixes
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Thu Sep 10 15:03:37 UTC 2020
Module: Mesa
Branch: staging/20.1
Commit: 7620193f96b5fa0e7c3f69ba644d8025bf6e9b70
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7620193f96b5fa0e7c3f69ba644d8025bf6e9b70
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Tue Sep 8 18:36:47 2020 -0500
nir: More NIR_MAX_VEC_COMPONENTS fixes
A couple of these probably aren't strictly necessary but they won't
hurt. The one that's particularly tricky is a fixed-length array in
nir_search.h. However, to avoid blowing up the binary size of
nir_opt_algebraic by about 2x, we just assert that only small ops are
used.
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Jesse Natalie <jenatali at microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6655>
(cherry picked from commit d86e38af2c6c9e7f70b31fb6482a875c6d10427c)
---
.pick_status.json | 2 +-
src/compiler/nir/nir_algebraic.py | 3 +++
src/compiler/nir/nir_instr_set.c | 4 ++--
src/compiler/nir/nir_lower_regs_to_ssa.c | 5 ++++-
src/compiler/nir/nir_lower_subgroups.c | 2 +-
src/compiler/nir/nir_move_vec_src_uses_to_dest.c | 3 ++-
src/compiler/nir/nir_opt_comparison_pre.c | 2 +-
src/compiler/nir/nir_opt_idiv_const.c | 2 +-
src/compiler/nir/nir_opt_if.c | 2 +-
src/compiler/nir/nir_opt_vectorize.c | 6 ++++--
10 files changed, 20 insertions(+), 11 deletions(-)
diff --git a/.pick_status.json b/.pick_status.json
index a7c742f1183..afbd6847168 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -229,7 +229,7 @@
"description": "nir: More NIR_MAX_VEC_COMPONENTS fixes",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": null
},
diff --git a/src/compiler/nir/nir_algebraic.py b/src/compiler/nir/nir_algebraic.py
index 2112854570d..7c7adc285be 100644
--- a/src/compiler/nir/nir_algebraic.py
+++ b/src/compiler/nir/nir_algebraic.py
@@ -388,6 +388,9 @@ class Expression(Value):
self.sources = [ Value.create(src, "{0}_{1}".format(name_base, i), varset)
for (i, src) in enumerate(expr[1:]) ]
+ # nir_search_expression::srcs is hard-coded to 4
+ assert len(self.sources) <= 4
+
if self.opcode in conv_opcode_types:
assert self._bit_size is None, \
'Expression cannot use an unsized conversion opcode with ' \
diff --git a/src/compiler/nir/nir_instr_set.c b/src/compiler/nir/nir_instr_set.c
index 212afbf3dac..efccd4db9e6 100644
--- a/src/compiler/nir/nir_instr_set.c
+++ b/src/compiler/nir/nir_instr_set.c
@@ -476,7 +476,7 @@ nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
return true;
}
- uint8_t alu1_swizzle[4] = {0};
+ uint8_t alu1_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
nir_src alu1_actual_src;
nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
@@ -493,7 +493,7 @@ nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
alu1_swizzle[i] = i;
}
- uint8_t alu2_swizzle[4] = {0};
+ uint8_t alu2_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
nir_src alu2_actual_src;
nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
diff --git a/src/compiler/nir/nir_lower_regs_to_ssa.c b/src/compiler/nir/nir_lower_regs_to_ssa.c
index 027c5db504c..cc290aabc0f 100644
--- a/src/compiler/nir/nir_lower_regs_to_ssa.c
+++ b/src/compiler/nir/nir_lower_regs_to_ssa.c
@@ -131,7 +131,10 @@ rewrite_alu_instr(nir_alu_instr *alu, struct regs_to_ssa_state *state)
* channels in the write mask.
*/
unsigned num_components;
- unsigned vec_swizzle[4] = { 0, 1, 2, 3 };
+ uint8_t vec_swizzle[NIR_MAX_VEC_COMPONENTS];
+ for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
+ vec_swizzle[i] = i;
+
if (nir_op_infos[alu->op].output_size == 0) {
/* Figure out the swizzle we need on the vecN operation and compute
* the number of components in the SSA def at the same time.
diff --git a/src/compiler/nir/nir_lower_subgroups.c b/src/compiler/nir/nir_lower_subgroups.c
index 2a7361b7472..4aae1b586cc 100644
--- a/src/compiler/nir/nir_lower_subgroups.c
+++ b/src/compiler/nir/nir_lower_subgroups.c
@@ -120,7 +120,7 @@ lower_subgroup_op_to_scalar(nir_builder *b, nir_intrinsic_instr *intrin,
nir_ssa_def *value = nir_ssa_for_src(b, intrin->src[0],
intrin->num_components);
- nir_ssa_def *reads[4];
+ nir_ssa_def *reads[NIR_MAX_VEC_COMPONENTS];
for (unsigned i = 0; i < intrin->num_components; i++) {
nir_intrinsic_instr *chan_intrin =
diff --git a/src/compiler/nir/nir_move_vec_src_uses_to_dest.c b/src/compiler/nir/nir_move_vec_src_uses_to_dest.c
index 6acd679a0ad..72a0a69e6f4 100644
--- a/src/compiler/nir/nir_move_vec_src_uses_to_dest.c
+++ b/src/compiler/nir/nir_move_vec_src_uses_to_dest.c
@@ -110,7 +110,8 @@ move_vec_src_uses_to_dest_block(nir_block *block)
continue;
for (unsigned i; i = ffs(srcs_remaining) - 1, srcs_remaining;) {
- int8_t swizzle[4] = { -1, -1, -1, -1 };
+ int8_t swizzle[NIR_MAX_VEC_COMPONENTS];
+ memset(swizzle, -1, sizeof(swizzle));
for (unsigned j = i; j < nir_op_infos[vec->op].num_inputs; j++) {
if (vec->src[j].src.ssa != vec->src[i].src.ssa)
diff --git a/src/compiler/nir/nir_opt_comparison_pre.c b/src/compiler/nir/nir_opt_comparison_pre.c
index 8e1a80338ed..506a8427c0a 100644
--- a/src/compiler/nir/nir_opt_comparison_pre.c
+++ b/src/compiler/nir/nir_opt_comparison_pre.c
@@ -237,7 +237,7 @@ comparison_pre_block(nir_block *block, struct block_queue *bq, nir_builder *bld)
if (alu->dest.saturate)
continue;
- static const uint8_t swizzle[4] = { 0, 0, 0, 0 };
+ static const uint8_t swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
switch (alu->op) {
case nir_op_fadd: {
diff --git a/src/compiler/nir/nir_opt_idiv_const.c b/src/compiler/nir/nir_opt_idiv_const.c
index 688186779e6..08e4b8ea4a2 100644
--- a/src/compiler/nir/nir_opt_idiv_const.c
+++ b/src/compiler/nir/nir_opt_idiv_const.c
@@ -111,7 +111,7 @@ nir_opt_idiv_const_instr(nir_builder *b, nir_alu_instr *alu)
b->cursor = nir_before_instr(&alu->instr);
- nir_ssa_def *q[4];
+ nir_ssa_def *q[NIR_MAX_VEC_COMPONENTS];
for (unsigned comp = 0; comp < alu->dest.dest.ssa.num_components; comp++) {
/* Get the numerator for the channel */
nir_ssa_def *n = nir_channel(b, alu->src[0].src.ssa,
diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c
index 65f540745f7..cbbf8ddf0e2 100644
--- a/src/compiler/nir/nir_opt_if.c
+++ b/src/compiler/nir/nir_opt_if.c
@@ -1128,7 +1128,7 @@ propagate_condition_eval(nir_builder *b, nir_if *nif, nir_src *use_src,
if (!evaluate_if_condition(nif, b->cursor, &bool_value))
return false;
- nir_ssa_def *def[4] = {0};
+ nir_ssa_def *def[NIR_MAX_VEC_COMPONENTS] = {0};
for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
if (alu->src[i].src.ssa == use_src->ssa) {
def[i] = nir_imm_bool(b, bool_value);
diff --git a/src/compiler/nir/nir_opt_vectorize.c b/src/compiler/nir/nir_opt_vectorize.c
index 20e03db0d38..e413a9da257 100644
--- a/src/compiler/nir/nir_opt_vectorize.c
+++ b/src/compiler/nir/nir_opt_vectorize.c
@@ -192,7 +192,7 @@ instr_try_combine(nir_instr *instr1, nir_instr *instr2)
nir_const_value *c1 = nir_src_as_const_value(alu1->src[i].src);
nir_const_value *c2 = nir_src_as_const_value(alu2->src[i].src);
assert(c1 && c2);
- nir_const_value value[4];
+ nir_const_value value[NIR_MAX_VEC_COMPONENTS];
unsigned bit_size = alu1->src[i].src.ssa->bit_size;
for (unsigned j = 0; j < total_components; j++) {
@@ -221,7 +221,9 @@ instr_try_combine(nir_instr *instr1, nir_instr *instr2)
nir_builder_instr_insert(&b, &new_alu->instr);
- unsigned swiz[4] = {0, 1, 2, 3};
+ unsigned swiz[NIR_MAX_VEC_COMPONENTS];
+ for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
+ swiz[i] = i;
nir_ssa_def *new_alu1 = nir_swizzle(&b, &new_alu->dest.dest.ssa, swiz,
alu1_components);
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