Mesa (master): anv/image: Disable multi-layer CCS_E on TGL+

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Fri Sep 11 23:40:33 UTC 2020


Module: Mesa
Branch: master
Commit: e3101c96bb64dd5c8246654a9c4865fa99a060b0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3101c96bb64dd5c8246654a9c4865fa99a060b0

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Mon Aug 31 14:59:44 2020 -0700

anv/image: Disable multi-layer CCS_E on TGL+

Anv doesn't do multi-layer fast-clear tracking, but TGL may add
fast-clears to multiple layers. Disable CCS_E for image arrays on TGL+
until anv gets more clear color tracking abilities.

With this change, anv+TGL now passes:
* dEQP-VK.multiview.readback_implicit_clear.15_15_15_15
* dEQP-VK.multiview.readback_implicit_clear.8_1_1_8
* dEQP-VK.multiview.readback_implicit_clear.1_2_4_8_16_32
* dEQP-VK.multiview.renderpass2.readback_implicit_clear.15_15_15_15
* dEQP-VK.multiview.renderpass2.readback_implicit_clear.8_1_1_8
* dEQP-VK.multiview.renderpass2.readback_implicit_clear.1_2_4_8_16_32

v2. Mention HSD 14010672564. (Sagar)

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6528>

---

 src/intel/vulkan/anv_image.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index e56d3cfb034..1324d97d654 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -455,6 +455,19 @@ add_aux_surface_if_supported(struct anv_device *device,
          return VK_SUCCESS;
       }
 
+      if (device->info.gen >= 12 && image->array_size > 1) {
+         /* HSD 14010672564: On TGL, if a block of fragment shader outputs
+          * match the surface's clear color, the HW may convert them to
+          * fast-clears. Anv only does clear color tracking for the first
+          * slice unfortunately. Disable CCS until anv gains more clear color
+          * tracking abilities.
+          */
+         anv_perf_warn(device, image,
+                       "HW may put fast-clear blocks on more slices than SW "
+                       "currently tracks. Not allocating a CCS buffer.");
+         return VK_SUCCESS;
+      }
+
       if (unlikely(INTEL_DEBUG & DEBUG_NO_RBC))
          return VK_SUCCESS;
 



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