Mesa (master): radeonsi: Move display dcc dirty tracking to framebuffer emission.

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Sat Sep 19 07:32:47 UTC 2020


Module: Mesa
Branch: master
Commit: 017ca86b2230b168f8a4fdffc2b56fd7d77df049
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=017ca86b2230b168f8a4fdffc2b56fd7d77df049

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Fri Aug  7 03:05:37 2020 +0200

radeonsi: Move display dcc dirty tracking to framebuffer emission.

To improve performance.

Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>

---

 src/gallium/drivers/radeonsi/si_pipe.h       |  1 -
 src/gallium/drivers/radeonsi/si_state.c      | 27 +++++++++++++++++++++++----
 src/gallium/drivers/radeonsi/si_state_draw.c | 14 --------------
 3 files changed, 23 insertions(+), 19 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index faa87abc729..f7eb36dcc4d 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -706,7 +706,6 @@ struct si_framebuffer {
    ubyte nr_color_samples; /* at most 8xAA */
    ubyte compressed_cb_mask;
    ubyte uncompressed_cb_mask;
-   ubyte displayable_dcc_cb_mask;
    ubyte color_is_int8;
    ubyte color_is_int10;
    ubyte dirty_cbufs;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index e098e9c5e63..89f936e9fd7 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2567,6 +2567,27 @@ static void si_dec_framebuffer_counters(const struct pipe_framebuffer_state *sta
    }
 }
 
+static void si_update_display_dcc_dirty(struct si_context *sctx)
+{
+   const struct pipe_framebuffer_state *state = &sctx->framebuffer.state;
+   struct si_surface *surf;
+   struct si_texture *tex;
+   int i;
+
+   for (i = 0; i < state->nr_cbufs; i++) {
+      if (!state->cbufs[i])
+         continue;
+
+      surf = (struct si_surface *)state->cbufs[i];
+      tex = (struct si_texture *)surf->base.texture;
+
+      if (!tex->surface.display_dcc_offset)
+         continue;
+
+      tex->displayable_dcc_dirty = true;
+   }
+}
+
 static void si_set_framebuffer_state(struct pipe_context *ctx,
                                      const struct pipe_framebuffer_state *state)
 {
@@ -2694,7 +2715,6 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
 
    sctx->framebuffer.compressed_cb_mask = 0;
    sctx->framebuffer.uncompressed_cb_mask = 0;
-   sctx->framebuffer.displayable_dcc_cb_mask = 0;
    sctx->framebuffer.nr_samples = util_framebuffer_get_num_samples(state);
    sctx->framebuffer.nr_color_samples = sctx->framebuffer.nr_samples;
    sctx->framebuffer.log_samples = util_logbase2(sctx->framebuffer.nr_samples);
@@ -2732,9 +2752,6 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
       else
          sctx->framebuffer.uncompressed_cb_mask |= 1 << i;
 
-      if (tex->surface.display_dcc_offset)
-         sctx->framebuffer.displayable_dcc_cb_mask |= 1 << i;
-
       /* Don't update nr_color_samples for non-AA buffers.
        * (e.g. destination of MSAA resolve)
        */
@@ -3226,6 +3243,8 @@ static void si_emit_framebuffer_state(struct si_context *sctx)
       radeon_emit(cs, EVENT_TYPE(V_028A90_BREAK_BATCH) | EVENT_INDEX(0));
    }
 
+   si_update_display_dcc_dirty(sctx);
+
    sctx->framebuffer.dirty_cbufs = 0;
    sctx->framebuffer.dirty_zsbuf = false;
 }
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 224ad8e6dae..fa203fa6116 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -2025,20 +2025,6 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
          cik_emit_prefetch_L2(sctx, false);
    }
 
-   /* Mark the displayable dcc buffer as dirty in order to update
-    * it on the next call to si_flush_resource. */
-   if (sctx->screen->info.use_display_dcc_with_retile_blit) {
-      /* Don't use si_update_fb_dirtiness_after_rendering because it'll
-       * cause unnecessary texture decompressions on each draw. */
-      unsigned displayable_dcc_cb_mask = sctx->framebuffer.displayable_dcc_cb_mask;
-      while (displayable_dcc_cb_mask) {
-         unsigned i = u_bit_scan(&displayable_dcc_cb_mask);
-         struct pipe_surface *surf = sctx->framebuffer.state.cbufs[i];
-         struct si_texture *tex = (struct si_texture *)surf->texture;
-         tex->displayable_dcc_dirty = true;
-      }
-   }
-
    /* Clear the context roll flag after the draw call. */
    sctx->context_roll = false;
 



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