Mesa (master): nir: Rename get_buffer_size to get_ssbo_size
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gitlab-mirror at kemper.freedesktop.org
Tue Sep 22 14:03:58 UTC 2020
Module: Mesa
Branch: master
Commit: 9750164c0931a2af87bc42e39dcbdcf2ce820b21
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9750164c0931a2af87bc42e39dcbdcf2ce820b21
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Tue Sep 22 03:24:45 2020 -0500
nir: Rename get_buffer_size to get_ssbo_size
This makes it explicit that this intrinsic is only for SSBOs. For the
v3dv driver, we'll be adding a get_ubo_size intrinsic and we want to be
able to distinguish between the two.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6812>
---
src/amd/compiler/aco_instruction_selection.cpp | 6 +++---
src/amd/compiler/aco_instruction_selection_setup.cpp | 2 +-
src/amd/llvm/ac_nir_to_llvm.c | 8 ++++----
src/broadcom/compiler/nir_to_vir.c | 2 +-
src/compiler/glsl/glsl_to_nir.cpp | 2 +-
src/compiler/nir/nir_divergence_analysis.c | 2 +-
src/compiler/nir/nir_intrinsics.py | 4 ++--
src/compiler/nir/nir_lower_io.c | 3 ++-
src/compiler/spirv/vtn_variables.c | 2 +-
src/freedreno/ir3/ir3_compiler_nir.c | 2 +-
src/freedreno/ir3/ir3_nir.c | 2 +-
src/freedreno/ir3/ir3_shader.h | 6 +++---
src/freedreno/vulkan/tu_shader.c | 2 +-
src/gallium/auxiliary/gallivm/lp_bld_nir.c | 12 ++++++------
src/gallium/auxiliary/gallivm/lp_bld_nir.h | 4 ++--
src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c | 6 +++---
src/gallium/drivers/iris/iris_program.c | 4 ++--
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 2 +-
src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp | 2 +-
src/intel/compiler/brw_fs_nir.cpp | 2 +-
src/intel/compiler/brw_vec4_nir.cpp | 2 +-
src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 12 ++++++------
src/panfrost/bifrost/bifrost_compile.c | 2 +-
src/panfrost/midgard/midgard_compile.c | 2 +-
src/panfrost/util/pan_sysval.c | 2 +-
25 files changed, 48 insertions(+), 47 deletions(-)
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index eeecacfb0de..d3236c85e10 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -6208,7 +6208,7 @@ void visit_atomic_ssbo(isel_context *ctx, nir_intrinsic_instr *instr)
ctx->block->instructions.emplace_back(std::move(mubuf));
}
-void visit_get_buffer_size(isel_context *ctx, nir_intrinsic_instr *instr) {
+void visit_get_ssbo_size(isel_context *ctx, nir_intrinsic_instr *instr) {
Temp index = convert_pointer_to_64_bit(ctx, get_ssa_temp(ctx, instr->src[0].ssa));
Builder bld(ctx->program, ctx->block);
@@ -7414,8 +7414,8 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
case nir_intrinsic_store_scratch:
visit_store_scratch(ctx, instr);
break;
- case nir_intrinsic_get_buffer_size:
- visit_get_buffer_size(ctx, instr);
+ case nir_intrinsic_get_ssbo_size:
+ visit_get_ssbo_size(ctx, instr);
break;
case nir_intrinsic_scoped_barrier:
emit_scoped_barrier(ctx, instr);
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp
index ecc33769196..6d7a927cc66 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -896,7 +896,7 @@ void init_context(isel_context *ctx, nir_shader *shader)
case nir_intrinsic_load_num_subgroups:
case nir_intrinsic_load_first_vertex:
case nir_intrinsic_load_base_instance:
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
case nir_intrinsic_vote_all:
case nir_intrinsic_vote_any:
case nir_intrinsic_read_first_invocation:
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index c1411366871..f738b690a24 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -1569,8 +1569,8 @@ static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx, nir_int
return LLVMBuildLoad(ctx->ac.builder, ptr, "");
}
-static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
- const nir_intrinsic_instr *instr)
+static LLVMValueRef visit_get_ssbo_size(struct ac_nir_context *ctx,
+ const nir_intrinsic_instr *instr)
{
LLVMValueRef index = get_src(ctx, instr->src[0]);
@@ -3716,8 +3716,8 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
case nir_intrinsic_load_ubo:
result = visit_load_ubo_buffer(ctx, instr);
break;
- case nir_intrinsic_get_buffer_size:
- result = visit_get_buffer_size(ctx, instr);
+ case nir_intrinsic_get_ssbo_size:
+ result = visit_get_ssbo_size(ctx, instr);
break;
case nir_intrinsic_load_deref:
result = visit_load_var(ctx, instr);
diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c
index 1c6aeec56e5..3ec6bc47edb 100644
--- a/src/broadcom/compiler/nir_to_vir.c
+++ b/src/broadcom/compiler/nir_to_vir.c
@@ -2150,7 +2150,7 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
v3d40_vir_emit_image_load_store(c, instr);
break;
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
ntq_store_dest(c, &instr->dest, 0,
vir_uniform(c, QUNIFORM_GET_BUFFER_SIZE,
nir_src_as_uint(instr->src[0])));
diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp
index 90a8ed13747..5a89cf49beb 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -2090,7 +2090,7 @@ nir_visitor::visit(ir_expression *ir)
case ir_unop_get_buffer_size: {
nir_intrinsic_instr *load = nir_intrinsic_instr_create(
this->shader,
- nir_intrinsic_get_buffer_size);
+ nir_intrinsic_get_ssbo_size);
load->num_components = ir->type->vector_elements;
load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
unsigned bit_size = glsl_get_bit_size(ir->type);
diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c
index 85663c83615..6a5225d3b94 100644
--- a/src/compiler/nir/nir_divergence_analysis.c
+++ b/src/compiler/nir/nir_divergence_analysis.c
@@ -267,7 +267,7 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state)
case nir_intrinsic_image_samples:
case nir_intrinsic_image_deref_samples:
case nir_intrinsic_bindless_image_samples:
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
case nir_intrinsic_image_size:
case nir_intrinsic_image_deref_size:
case nir_intrinsic_bindless_image_size:
diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py
index ae560fc48a1..65c7a232dd5 100644
--- a/src/compiler/nir/nir_intrinsics.py
+++ b/src/compiler/nir/nir_intrinsics.py
@@ -194,9 +194,9 @@ intrinsic("interp_deref_at_vertex", src_comp=[1, 1], dest_comp=0,
intrinsic("deref_buffer_array_length", src_comp=[-1], dest_comp=1,
flags=[CAN_ELIMINATE, CAN_REORDER])
-# Ask the driver for the size of a given buffer. It takes the buffer index
+# Ask the driver for the size of a given SSBO. It takes the buffer index
# as source.
-intrinsic("get_buffer_size", src_comp=[-1], dest_comp=1,
+intrinsic("get_ssbo_size", src_comp=[-1], dest_comp=1,
flags=[CAN_ELIMINATE, CAN_REORDER])
# a barrier is an intrinsic with no inputs/outputs but which can't be moved
diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_io.c
index c90119be05b..bc27114ded0 100644
--- a/src/compiler/nir/nir_lower_io.c
+++ b/src/compiler/nir/nir_lower_io.c
@@ -1653,6 +1653,7 @@ lower_explicit_io_array_length(nir_builder *b, nir_intrinsic_instr *intrin,
assert(glsl_type_is_array(deref->type));
assert(glsl_get_length(deref->type) == 0);
+ assert(deref->mode == nir_var_mem_ssbo);
unsigned stride = glsl_get_explicit_stride(deref->type);
assert(stride > 0);
@@ -1661,7 +1662,7 @@ lower_explicit_io_array_length(nir_builder *b, nir_intrinsic_instr *intrin,
nir_ssa_def *offset = addr_to_offset(b, addr, addr_format);
nir_intrinsic_instr *bsize =
- nir_intrinsic_instr_create(b->shader, nir_intrinsic_get_buffer_size);
+ nir_intrinsic_instr_create(b->shader, nir_intrinsic_get_ssbo_size);
bsize->src[0] = nir_src_for_ssa(index);
nir_ssa_dest_init(&bsize->instr, &bsize->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &bsize->instr);
diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c
index f97887254c3..5e8ca96a5f5 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -2818,7 +2818,7 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
nir_intrinsic_instr *instr =
nir_intrinsic_instr_create(b->nb.shader,
- nir_intrinsic_get_buffer_size);
+ nir_intrinsic_get_ssbo_size);
instr->src[0] = nir_src_for_ssa(ptr->block_index);
nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
nir_builder_instr_insert(&b->nb, &instr->instr);
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 05613a8794f..1fd4bf2b42a 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -1678,7 +1678,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
ctx->so->no_earlyz = true;
ctx->funcs->emit_intrinsic_store_ssbo(ctx, intr);
break;
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
emit_intrinsic_ssbo_size(ctx, intr, dst);
break;
case nir_intrinsic_ssbo_atomic_add_ir3:
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index f3ca62063dd..308d42542f2 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -524,7 +524,7 @@ ir3_nir_scan_driver_consts(nir_shader *shader,
unsigned idx;
switch (intr->intrinsic) {
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
if (ir3_bindless_resource(intr->src[0]))
break;
idx = nir_src_as_uint(intr->src[0]);
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index b87b9b437d0..5b0ce85918b 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -127,7 +127,7 @@ struct ir3_ubo_analysis_state {
* be required, rather than allocating worst-case const space, we scan the
* shader and allocate consts as-needed:
*
- * + SSBO sizes: only needed if shader has a get_buffer_size intrinsic
+ * + SSBO sizes: only needed if shader has a get_ssbo_size intrinsic
* for a given SSBO
*
* + Image dimensions: needed to calculate pixel offset, but only for
@@ -171,9 +171,9 @@ struct ir3_const_state {
} offsets;
struct {
- uint32_t mask; /* bitmask of SSBOs that have get_buffer_size */
+ uint32_t mask; /* bitmask of SSBOs that have get_ssbo_size */
uint32_t count; /* number of consts allocated */
- /* one const allocated per SSBO which has get_buffer_size,
+ /* one const allocated per SSBO which has get_ssbo_size,
* ssbo_sizes.off[ssbo_id] is offset from start of ssbo_sizes
* consts:
*/
diff --git a/src/freedreno/vulkan/tu_shader.c b/src/freedreno/vulkan/tu_shader.c
index 4348ea1985e..19603511e3b 100644
--- a/src/freedreno/vulkan/tu_shader.c
+++ b/src/freedreno/vulkan/tu_shader.c
@@ -387,7 +387,7 @@ lower_intrinsic(nir_builder *b, nir_intrinsic_instr *instr,
case nir_intrinsic_ssbo_atomic_fmin:
case nir_intrinsic_ssbo_atomic_fmax:
case nir_intrinsic_ssbo_atomic_fcomp_swap:
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
lower_ssbo_ubo_intrinsic(b, instr);
return true;
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
index f0f8a9c9518..b5ee9744e4f 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
@@ -1083,12 +1083,12 @@ static void visit_store_ssbo(struct lp_build_nir_context *bld_base,
bld_base->store_mem(bld_base, writemask, nc, bitsize, idx, offset, val);
}
-static void visit_get_buffer_size(struct lp_build_nir_context *bld_base,
- nir_intrinsic_instr *instr,
- LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
+static void visit_get_ssbo_size(struct lp_build_nir_context *bld_base,
+ nir_intrinsic_instr *instr,
+ LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
{
LLVMValueRef idx = get_src(bld_base, instr->src[0]);
- result[0] = bld_base->get_buffer_size(bld_base, idx);
+ result[0] = bld_base->get_ssbo_size(bld_base, idx);
}
static void visit_ssbo_atomic(struct lp_build_nir_context *bld_base,
@@ -1446,8 +1446,8 @@ static void visit_intrinsic(struct lp_build_nir_context *bld_base,
case nir_intrinsic_store_ssbo:
visit_store_ssbo(bld_base, instr);
break;
- case nir_intrinsic_get_buffer_size:
- visit_get_buffer_size(bld_base, instr, result);
+ case nir_intrinsic_get_ssbo_size:
+ visit_get_ssbo_size(bld_base, instr, result);
break;
case nir_intrinsic_load_vertex_id:
case nir_intrinsic_load_primitive_id:
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.h b/src/gallium/auxiliary/gallivm/lp_bld_nir.h
index 7f29575bad5..65b574fda01 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_nir.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.h
@@ -110,8 +110,8 @@ struct lp_build_nir_context
struct lp_img_params *params);
void (*image_size)(struct lp_build_nir_context *bld_base,
struct lp_sampler_size_query_params *params);
- LLVMValueRef (*get_buffer_size)(struct lp_build_nir_context *bld_base,
- LLVMValueRef index);
+ LLVMValueRef (*get_ssbo_size)(struct lp_build_nir_context *bld_base,
+ LLVMValueRef index);
void (*load_var)(struct lp_build_nir_context *bld_base,
nir_variable_mode deref_mode,
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
index b83acd0b58f..54a286c1662 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
@@ -1252,8 +1252,8 @@ static void emit_barrier(struct lp_build_nir_context *bld_base)
LLVMPositionBuilderAtEnd(gallivm->builder, resume);
}
-static LLVMValueRef emit_get_buffer_size(struct lp_build_nir_context *bld_base,
- LLVMValueRef index)
+static LLVMValueRef emit_get_ssbo_size(struct lp_build_nir_context *bld_base,
+ LLVMValueRef index)
{
struct gallivm_state *gallivm = bld_base->base.gallivm;
struct lp_build_nir_soa_context *bld = (struct lp_build_nir_soa_context *)bld_base;
@@ -1890,7 +1890,7 @@ void lp_build_nir_soa(struct gallivm_state *gallivm,
bld.bld_base.end_primitive = end_primitive;
bld.bld_base.load_mem = emit_load_mem;
bld.bld_base.store_mem = emit_store_mem;
- bld.bld_base.get_buffer_size = emit_get_buffer_size;
+ bld.bld_base.get_ssbo_size = emit_get_ssbo_size;
bld.bld_base.atomic_mem = emit_atomic_mem;
bld.bld_base.barrier = emit_barrier;
bld.bld_base.image_op = emit_image_op;
diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c
index 4f443a9f2d1..d3f15aaf745 100644
--- a/src/gallium/drivers/iris/iris_program.c
+++ b/src/gallium/drivers/iris/iris_program.c
@@ -879,7 +879,7 @@ iris_setup_binding_table(const struct gen_device_info *devinfo,
mark_used_with_src(bt, &intrin->src[1], IRIS_SURFACE_GROUP_SSBO);
break;
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
case nir_intrinsic_ssbo_atomic_add:
case nir_intrinsic_ssbo_atomic_imin:
case nir_intrinsic_ssbo_atomic_umin:
@@ -984,7 +984,7 @@ iris_setup_binding_table(const struct gen_device_info *devinfo,
}
break;
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
case nir_intrinsic_ssbo_atomic_add:
case nir_intrinsic_ssbo_atomic_imin:
case nir_intrinsic_ssbo_atomic_umin:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index e2f83e44ed5..c466d249e58 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -1997,7 +1997,7 @@ Converter::visit(nir_intrinsic_instr *insn)
}
break;
}
- case nir_intrinsic_get_buffer_size: {
+ case nir_intrinsic_get_ssbo_size: {
LValues &newDefs = convert(&insn->dest);
const DataType dType = getDType(insn);
Value *indirectBuffer;
diff --git a/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp b/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp
index 33f9022e82f..7f839be337e 100644
--- a/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp
@@ -98,7 +98,7 @@ bool EmitSSBOInstruction::do_emit(nir_instr* instr)
return emit_image_load(intr);
case nir_intrinsic_image_size:
return emit_image_size(intr);
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
return emit_buffer_size(intr);
default:
return false;
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index e95159141e3..5abeefe66b4 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -4750,7 +4750,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
nir_emit_ssbo_atomic_float(bld, brw_aop_for_nir_intrinsic(instr), instr);
break;
- case nir_intrinsic_get_buffer_size: {
+ case nir_intrinsic_get_ssbo_size: {
assert(nir_src_num_components(instr->src[0]) == 1);
unsigned ssbo_index = nir_src_is_const(instr->src[0]) ?
nir_src_as_uint(instr->src[0]) : 0;
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 8ba60cb8b2c..3825a84b66e 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -437,7 +437,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
break;
}
- case nir_intrinsic_get_buffer_size: {
+ case nir_intrinsic_get_ssbo_size: {
assert(nir_src_num_components(instr->src[0]) == 1);
unsigned ssbo_index = nir_src_is_const(instr->src[0]) ?
nir_src_as_uint(instr->src[0]) : 0;
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 4787bf44aba..f4aafe6d6c4 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -319,8 +319,8 @@ lower_direct_buffer_access(nir_function_impl *impl,
try_lower_direct_buffer_intrinsic(intrin, true, state);
break;
- case nir_intrinsic_get_buffer_size: {
- /* The get_buffer_size intrinsic always just takes a
+ case nir_intrinsic_get_ssbo_size: {
+ /* The get_ssbo_size intrinsic always just takes a
* index/reindex intrinsic.
*/
if (!find_descriptor_for_index_src(intrin->src[0], state))
@@ -674,8 +674,8 @@ lower_load_vulkan_descriptor(nir_intrinsic_instr *intrin,
}
static void
-lower_get_buffer_size(nir_intrinsic_instr *intrin,
- struct apply_pipeline_layout_state *state)
+lower_get_ssbo_size(nir_intrinsic_instr *intrin,
+ struct apply_pipeline_layout_state *state)
{
if (_mesa_set_search(state->lowered_instrs, intrin))
return;
@@ -1095,8 +1095,8 @@ apply_pipeline_layout_block(nir_block *block,
case nir_intrinsic_load_vulkan_descriptor:
lower_load_vulkan_descriptor(intrin, state);
break;
- case nir_intrinsic_get_buffer_size:
- lower_get_buffer_size(intrin, state);
+ case nir_intrinsic_get_ssbo_size:
+ lower_get_ssbo_size(intrin, state);
break;
case nir_intrinsic_image_deref_load:
case nir_intrinsic_image_deref_store:
diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index 2e5785ab04c..73d0809b6e1 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -454,7 +454,7 @@ emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
bi_emit_sysval(ctx, &instr->instr, 1, 0);
break;
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
bi_emit_sysval(ctx, &instr->instr, 1, 8);
break;
diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index 79b41818398..534eaad9d5e 100644
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -2006,7 +2006,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
emit_sysval_read(ctx, &instr->instr, 1, 0);
break;
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
emit_sysval_read(ctx, &instr->instr, 1, 8);
break;
diff --git a/src/panfrost/util/pan_sysval.c b/src/panfrost/util/pan_sysval.c
index 2789c52daaf..cbc957e50a2 100644
--- a/src/panfrost/util/pan_sysval.c
+++ b/src/panfrost/util/pan_sysval.c
@@ -59,7 +59,7 @@ panfrost_nir_sysval_for_intrinsic(nir_intrinsic_instr *instr)
case nir_intrinsic_load_num_work_groups:
return PAN_SYSVAL_NUM_WORK_GROUPS;
case nir_intrinsic_load_ssbo_address:
- case nir_intrinsic_get_buffer_size:
+ case nir_intrinsic_get_ssbo_size:
return panfrost_sysval_for_ssbo(instr);
case nir_intrinsic_load_sampler_lod_parameters_pan:
return panfrost_sysval_for_sampler(instr);
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