Mesa (master): nir: gather indirect info from lowered IO intrinsics

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Module: Mesa
Branch: master
Commit: 10be706778bd670197a66765c550cbb3a0cfda6d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=10be706778bd670197a66765c550cbb3a0cfda6d

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Sep 16 01:11:31 2020 -0400

nir: gather indirect info from lowered IO intrinsics

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6758>

---

 src/compiler/nir/nir_gather_info.c | 47 +++++++++++++++++++++++---------------
 1 file changed, 28 insertions(+), 19 deletions(-)

diff --git a/src/compiler/nir/nir_gather_info.c b/src/compiler/nir/nir_gather_info.c
index 03f0d15f73e..eacaed06cde 100644
--- a/src/compiler/nir/nir_gather_info.c
+++ b/src/compiler/nir/nir_gather_info.c
@@ -354,38 +354,47 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
    }
 
    case nir_intrinsic_load_input:
-      if (shader->info.stage == MESA_SHADER_TESS_EVAL)
-         shader->info.patch_inputs_read |= slot_mask;
-      else
-         shader->info.inputs_read |= slot_mask;
-      break;
-
    case nir_intrinsic_load_per_vertex_input:
    case nir_intrinsic_load_input_vertex:
    case nir_intrinsic_load_interpolated_input:
-      shader->info.inputs_read |= slot_mask;
+      if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
+          instr->intrinsic == nir_intrinsic_load_input) {
+         shader->info.patch_inputs_read |= slot_mask;
+         if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
+            shader->info.patch_inputs_read_indirectly |= slot_mask;
+      } else {
+         shader->info.inputs_read |= slot_mask;
+         if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
+            shader->info.inputs_read_indirectly |= slot_mask;
+      }
       break;
 
    case nir_intrinsic_load_output:
-      if (shader->info.stage == MESA_SHADER_TESS_CTRL)
+   case nir_intrinsic_load_per_vertex_output:
+      if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
+          instr->intrinsic == nir_intrinsic_load_output) {
          shader->info.patch_outputs_read |= slot_mask;
-      else
+         if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
+            shader->info.patch_outputs_accessed_indirectly |= slot_mask;
+      } else {
          shader->info.outputs_read |= slot_mask;
-      break;
-
-   case nir_intrinsic_load_per_vertex_output:
-      shader->info.outputs_read |= slot_mask;
+         if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
+            shader->info.outputs_accessed_indirectly |= slot_mask;
+      }
       break;
 
    case nir_intrinsic_store_output:
-      if (shader->info.stage == MESA_SHADER_TESS_CTRL)
+   case nir_intrinsic_store_per_vertex_output:
+      if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
+          instr->intrinsic == nir_intrinsic_store_output) {
          shader->info.patch_outputs_written |= slot_mask;
-      else
+         if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
+            shader->info.patch_outputs_accessed_indirectly |= slot_mask;
+      } else {
          shader->info.outputs_written |= slot_mask;
-      break;
-
-   case nir_intrinsic_store_per_vertex_output:
-      shader->info.outputs_written |= slot_mask;
+         if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
+            shader->info.outputs_accessed_indirectly |= slot_mask;
+      }
       break;
 
    case nir_intrinsic_load_draw_id: