Mesa (master): zink: store base-object of DSA-state

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Module: Mesa
Branch: master
Commit: 4b2525b68dfe55691b0dfc84396f7a2c28d7dada
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b2525b68dfe55691b0dfc84396f7a2c28d7dada

Author: Erik Faye-Lund <erik.faye-lund at collabora.com>
Date:   Thu Sep 24 22:20:53 2020 +0200

zink: store base-object of DSA-state

This is useful in the next commit, where we need to inspect the
base-state.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6853>

---

 src/gallium/drivers/zink/zink_blit.c     |  2 +-
 src/gallium/drivers/zink/zink_context.h  |  1 +
 src/gallium/drivers/zink/zink_pipeline.h |  2 +-
 src/gallium/drivers/zink/zink_state.c    | 35 +++++++++++++++++++-------------
 src/gallium/drivers/zink/zink_state.h    |  7 ++++++-
 5 files changed, 30 insertions(+), 17 deletions(-)

diff --git a/src/gallium/drivers/zink/zink_blit.c b/src/gallium/drivers/zink/zink_blit.c
index 96824c8a049..8ec5c9312b7 100644
--- a/src/gallium/drivers/zink/zink_blit.c
+++ b/src/gallium/drivers/zink/zink_blit.c
@@ -202,7 +202,7 @@ zink_blit(struct pipe_context *pctx,
    }
 
    util_blitter_save_blend(ctx->blitter, ctx->gfx_pipeline_state.blend_state);
-   util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->gfx_pipeline_state.depth_stencil_alpha_state);
+   util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->dsa_state);
    util_blitter_save_vertex_elements(ctx->blitter, ctx->element_state);
    util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
    util_blitter_save_rasterizer(ctx->blitter, ctx->rast_state);
diff --git a/src/gallium/drivers/zink/zink_context.h b/src/gallium/drivers/zink/zink_context.h
index 314aa5f90e3..9dd80040368 100644
--- a/src/gallium/drivers/zink/zink_context.h
+++ b/src/gallium/drivers/zink/zink_context.h
@@ -89,6 +89,7 @@ struct zink_context {
 
    struct zink_vertex_elements_state *element_state;
    struct zink_rasterizer_state *rast_state;
+   struct zink_depth_stencil_alpha_state *dsa_state;
 
    struct zink_shader *gfx_stages[ZINK_SHADER_COUNT];
    struct zink_gfx_pipeline_state gfx_pipeline_state;
diff --git a/src/gallium/drivers/zink/zink_pipeline.h b/src/gallium/drivers/zink/zink_pipeline.h
index 4b14f00e594..4fc4dbf1199 100644
--- a/src/gallium/drivers/zink/zink_pipeline.h
+++ b/src/gallium/drivers/zink/zink_pipeline.h
@@ -49,7 +49,7 @@ struct zink_gfx_pipeline_state {
 
    struct zink_rasterizer_hw_state *rast_state;
 
-   struct zink_depth_stencil_alpha_state *depth_stencil_alpha_state;
+   struct zink_depth_stencil_alpha_hw_state *depth_stencil_alpha_state;
 
    VkSampleMask sample_mask;
    uint8_t rast_samples;
diff --git a/src/gallium/drivers/zink/zink_state.c b/src/gallium/drivers/zink/zink_state.c
index 374bbf95add..5053994a94a 100644
--- a/src/gallium/drivers/zink/zink_state.c
+++ b/src/gallium/drivers/zink/zink_state.c
@@ -334,28 +334,30 @@ zink_create_depth_stencil_alpha_state(struct pipe_context *pctx,
    if (!cso)
       return NULL;
 
+   cso->base = *depth_stencil_alpha;
+
    if (depth_stencil_alpha->depth.enabled) {
-      cso->depth_test = VK_TRUE;
-      cso->depth_compare_op = compare_op(depth_stencil_alpha->depth.func);
+      cso->hw_state.depth_test = VK_TRUE;
+      cso->hw_state.depth_compare_op = compare_op(depth_stencil_alpha->depth.func);
    }
 
    if (depth_stencil_alpha->depth.bounds_test) {
-      cso->depth_bounds_test = VK_TRUE;
-      cso->min_depth_bounds = depth_stencil_alpha->depth.bounds_min;
-      cso->max_depth_bounds = depth_stencil_alpha->depth.bounds_max;
+      cso->hw_state.depth_bounds_test = VK_TRUE;
+      cso->hw_state.min_depth_bounds = depth_stencil_alpha->depth.bounds_min;
+      cso->hw_state.max_depth_bounds = depth_stencil_alpha->depth.bounds_max;
    }
 
    if (depth_stencil_alpha->stencil[0].enabled) {
-      cso->stencil_test = VK_TRUE;
-      cso->stencil_front = stencil_op_state(depth_stencil_alpha->stencil);
+      cso->hw_state.stencil_test = VK_TRUE;
+      cso->hw_state.stencil_front = stencil_op_state(depth_stencil_alpha->stencil);
    }
 
    if (depth_stencil_alpha->stencil[1].enabled)
-      cso->stencil_back = stencil_op_state(depth_stencil_alpha->stencil + 1);
+      cso->hw_state.stencil_back = stencil_op_state(depth_stencil_alpha->stencil + 1);
    else
-      cso->stencil_back = cso->stencil_front;
+      cso->hw_state.stencil_back = cso->hw_state.stencil_front;
 
-   cso->depth_write = depth_stencil_alpha->depth.writemask;
+   cso->hw_state.depth_write = depth_stencil_alpha->depth.writemask;
 
    return cso;
 }
@@ -363,11 +365,16 @@ zink_create_depth_stencil_alpha_state(struct pipe_context *pctx,
 static void
 zink_bind_depth_stencil_alpha_state(struct pipe_context *pctx, void *cso)
 {
-   struct zink_gfx_pipeline_state* state = &zink_context(pctx)->gfx_pipeline_state;
+   struct zink_context *ctx = zink_context(pctx);
 
-   if (state->depth_stencil_alpha_state != cso) {
-      state->depth_stencil_alpha_state = cso;
-      state->hash = 0;
+   ctx->dsa_state = cso;
+
+   if (cso) {
+      struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
+      if (state->depth_stencil_alpha_state != &ctx->dsa_state->hw_state) {
+         state->depth_stencil_alpha_state = &ctx->dsa_state->hw_state;
+         state->hash = 0;
+      }
    }
 }
 
diff --git a/src/gallium/drivers/zink/zink_state.h b/src/gallium/drivers/zink/zink_state.h
index 5f0bc304da9..141f4c39126 100644
--- a/src/gallium/drivers/zink/zink_state.h
+++ b/src/gallium/drivers/zink/zink_state.h
@@ -71,7 +71,7 @@ struct zink_blend_state {
    bool need_blend_constants;
 };
 
-struct zink_depth_stencil_alpha_state {
+struct zink_depth_stencil_alpha_hw_state {
    VkBool32 depth_test;
    VkCompareOp depth_compare_op;
 
@@ -85,6 +85,11 @@ struct zink_depth_stencil_alpha_state {
    VkBool32 depth_write;
 };
 
+struct zink_depth_stencil_alpha_state {
+   struct pipe_depth_stencil_alpha_state base;
+   struct zink_depth_stencil_alpha_hw_state hw_state;
+};
+
 void
 zink_context_state_init(struct pipe_context *pctx);