Mesa (master): blorp: Ensure aligned HIZ_CCS_WT partial clears

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Module: Mesa
Branch: master
Commit: 7f3e881c6cd179a9a541a673f0fc67ef63e50cea
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f3e881c6cd179a9a541a673f0fc67ef63e50cea

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Thu Sep 24 10:01:11 2020 -0700

blorp: Ensure aligned HIZ_CCS_WT partial clears

Fixes: 5425fcf2cb3 ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments")
Reported-by: Sagar Ghuge <sagar.ghuge at intel.com>
Tested-by: Ivan Briano <ivan.briano at intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6854>

---

 src/intel/blorp/blorp_clear.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 4c569fd0018..0c3491cb5d3 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -834,11 +834,12 @@ blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo,
       const bool unaligned = (slice_x0 + x0) % 16 || (slice_y0 + y0) % 8 ||
                              (max_x1_y1 ? haligned_x1 % 16 || valigned_y1 % 8 :
                               x1 % 16 || y1 % 8);
-      const bool alignment_used = surf->levels > 1 ||
-                                  surf->logical_level0_px.depth > 1 ||
-                                  surf->logical_level0_px.array_len > 1;
+      const bool partial_clear = x0 > 0 || y0 > 0 || !max_x1_y1;
+      const bool multislice_surf = surf->levels > 1 ||
+                                   surf->logical_level0_px.depth > 1 ||
+                                   surf->logical_level0_px.array_len > 1;
 
-      if (unaligned && alignment_used)
+      if (unaligned && (partial_clear || multislice_surf))
          return false;
    }