Mesa (staging/20.2): radeonsi: fix indirect dispatches with variable block sizes

[GitLab Mirror]

Module: Mesa
Branch: staging/20.2
Commit: 401e03925d0bdcd761e6bbfa0a2825de59c08a8d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=401e03925d0bdcd761e6bbfa0a2825de59c08a8d

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Sep 17 19:45:14 2020 -0400

radeonsi: fix indirect dispatches with variable block sizes

The block size input was uninitialized.

Fixes: 77c81164bc1c "radeonsi: support ARB_compute_variable_group_size"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
(cherry picked from commit 8be46d6558e04f5dc9b8bebd31a36b1f3d593aa6)

---

 .pick_status.json                         |  2 +-
 src/gallium/drivers/radeonsi/si_compute.c | 21 ++++++++++-----------
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 52518971660..78ec2b91f4c 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1444,7 +1444,7 @@
         "description": "radeonsi: fix indirect dispatches with variable block sizes",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "77c81164bc1cd9ec98b32c40753f590791450434"
     },
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 4f8618cf775..6d97ed5ec88 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -703,27 +703,26 @@ static void si_setup_nir_user_data(struct si_context *sctx, const struct pipe_gr
                              12 * sel->info.uses_grid_size;
    unsigned cs_user_data_reg = block_size_reg + 12 * program->reads_variable_block_size;
 
-   if (info->indirect) {
-      if (sel->info.uses_grid_size) {
+   if (sel->info.uses_grid_size) {
+      if (info->indirect) {
          for (unsigned i = 0; i < 3; ++i) {
             si_cp_copy_data(sctx, sctx->gfx_cs, COPY_DATA_REG, NULL, (grid_size_reg >> 2) + i,
                             COPY_DATA_SRC_MEM, si_resource(info->indirect),
                             info->indirect_offset + 4 * i);
          }
-      }
-   } else {
-      if (sel->info.uses_grid_size) {
+      } else {
          radeon_set_sh_reg_seq(cs, grid_size_reg, 3);
          radeon_emit(cs, info->grid[0]);
          radeon_emit(cs, info->grid[1]);
          radeon_emit(cs, info->grid[2]);
       }
-      if (program->reads_variable_block_size) {
-         radeon_set_sh_reg_seq(cs, block_size_reg, 3);
-         radeon_emit(cs, info->block[0]);
-         radeon_emit(cs, info->block[1]);
-         radeon_emit(cs, info->block[2]);
-      }
+   }
+
+   if (program->reads_variable_block_size) {
+      radeon_set_sh_reg_seq(cs, block_size_reg, 3);
+      radeon_emit(cs, info->block[0]);
+      radeon_emit(cs, info->block[1]);
+      radeon_emit(cs, info->block[2]);
    }
 
    if (program->num_cs_user_data_dwords) {