Mesa (master): nir: Document a bit about how align_mul/offset work.

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Module: Mesa
Branch: master
Commit: 6c1c5714409c1e49f941289396cc5112da95dad9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c1c5714409c1e49f941289396cc5112da95dad9

Author: Eric Anholt <eric at anholt.net>
Date:   Tue Sep  8 13:07:56 2020 -0700

nir: Document a bit about how align_mul/offset work.

Introduces a #define for the maximum valid align_mul that's used in the
load_store_vectorizer tests (currently, though it will be used more soon).

Reviewed-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>

---

 src/compiler/nir/nir.h                                 | 15 +++++++++++++--
 src/compiler/nir/tests/load_store_vectorizer_tests.cpp |  2 +-
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 1ac0ba45cee..80400dc7996 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -1718,10 +1718,14 @@ typedef enum {
     * Alignment for offsets and addresses
     *
     * These two parameters, specify an alignment in terms of a multiplier and
-    * an offset.  The offset or address parameter X of the intrinsic is
-    * guaranteed to satisfy the following:
+    * an offset.  The multiplier is always a power of two.  The offset or
+    * address parameter X of the intrinsic is guaranteed to satisfy the
+    * following:
     *
     *                (X - align_offset) % align_mul == 0
+    *
+    * For constant offset values, align_mul will be NIR_ALIGN_MUL_MAX and the
+    * align_offset will be modulo that.
     */
    NIR_INTRINSIC_ALIGN_MUL,
    NIR_INTRINSIC_ALIGN_OFFSET,
@@ -1778,6 +1782,13 @@ typedef enum {
 
 } nir_intrinsic_index_flag;
 
+/**
+ * Maximum valid value for a nir align_mul value (in intrinsics or derefs).
+ *
+ * Offsets can be signed, so this is the largest power of two in int32_t.
+ */
+#define NIR_ALIGN_MUL_MAX 0x40000000
+
 typedef struct {
    unsigned location:7; /* gl_vert_attrib, gl_varying_slot, or gl_frag_result */
    unsigned num_slots:6;  /* max 32, may be pessimistic with const indexing */
diff --git a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp
index 75880c3805f..708cbefbabd 100644
--- a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp
+++ b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp
@@ -1875,6 +1875,6 @@ TEST_F(nir_load_store_vectorize_test, ubo_alignment_const_100)
       create_indirect_load(nir_var_mem_ubo, 0, nir_imm_int(b, 100), 0x1);
 
    EXPECT_TRUE(run_vectorizer(nir_var_mem_ubo));
-   EXPECT_EQ(nir_intrinsic_align_mul(load), 0x40000000);
+   EXPECT_EQ(nir_intrinsic_align_mul(load), NIR_ALIGN_MUL_MAX);
    EXPECT_EQ(nir_intrinsic_align_offset(load), 100);
 }