Mesa (master): ir3: convert shift amount to 16b for 16b shifts

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Thu Apr 1 18:13:36 UTC 2021


Module: Mesa
Branch: master
Commit: 14460faa6428974340cbb951ef8de9239daed5a4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=14460faa6428974340cbb951ef8de9239daed5a4

Author: Danylo Piliaiev <dpiliaiev at igalia.com>
Date:   Wed Mar 24 17:24:30 2021 +0200

ir3: convert shift amount to 16b for 16b shifts

NIR has shifts defined as:
 opcode("*shr", 0, tuint, [0, 0], [tuint, tuint32], False, ...

However, in ir3 we have to ensure that both operators of shift
instruction have the same bitness.

Let's hope that in future the additional COV for constants would
be optimized away.

Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9840>

---

 src/freedreno/ir3/ir3_compiler_nir.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index ccefcb90f25..dc407f5b083 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -265,6 +265,17 @@ create_cov(struct ir3_context *ctx, struct ir3_instruction *src,
 	return cov;
 }
 
+/* For shift instructions NIR always has shift amount as 32 bit integer */
+static struct ir3_instruction *
+resize_shift_amount(struct ir3_context *ctx,
+					struct ir3_instruction *src, unsigned bs)
+{
+	if (bs != 16)
+		return src;
+
+	return ir3_COV(ctx->block, src, TYPE_U32, TYPE_U16);
+}
+
 static void
 emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
 {
@@ -575,10 +586,10 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
 		dst[0] = ir3_OR_B(b, src[0], 0, src[1], 0);
 		break;
 	case nir_op_ishl:
-		dst[0] = ir3_SHL_B(b, src[0], 0, src[1], 0);
+		dst[0] = ir3_SHL_B(b, src[0], 0, resize_shift_amount(ctx, src[1], bs[0]), 0);
 		break;
 	case nir_op_ishr:
-		dst[0] = ir3_ASHR_B(b, src[0], 0, src[1], 0);
+		dst[0] = ir3_ASHR_B(b, src[0], 0, resize_shift_amount(ctx, src[1], bs[0]), 0);
 		break;
 	case nir_op_isub:
 		dst[0] = ir3_SUB_U(b, src[0], 0, src[1], 0);
@@ -587,7 +598,7 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
 		dst[0] = ir3_XOR_B(b, src[0], 0, src[1], 0);
 		break;
 	case nir_op_ushr:
-		dst[0] = ir3_SHR_B(b, src[0], 0, src[1], 0);
+		dst[0] = ir3_SHR_B(b, src[0], 0, resize_shift_amount(ctx, src[1], bs[0]), 0);
 		break;
 	case nir_op_ilt:
 		dst[0] = ir3_CMPS_S(b, src[0], 0, src[1], 0);



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