Mesa (master): gallium/pb: change pb_buffer::alignment to alignment_log2
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Tue Apr 6 22:53:21 UTC 2021
Module: Mesa
Branch: master
Commit: 712b629abff0ae66aa8fe51e5119f75c4161c7bb
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=712b629abff0ae66aa8fe51e5119f75c4161c7bb
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sun Mar 28 06:17:03 2021 -0400
gallium/pb: change pb_buffer::alignment to alignment_log2
Alignments are always 2^n, so store n = log2(alignment). The next commit
will take advantage of the saved space.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>
---
src/gallium/auxiliary/pipebuffer/pb_buffer.h | 8 +++++++-
src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c | 2 +-
src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c | 4 ++--
src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c | 4 ++--
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c | 2 +-
src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c | 4 ++--
src/gallium/auxiliary/pipebuffer/pb_cache.c | 2 +-
src/gallium/drivers/d3d12/d3d12_bufmgr.cpp | 2 +-
src/gallium/drivers/r600/r600_state.c | 4 ++--
src/gallium/drivers/r600/r600_texture.c | 2 +-
src/gallium/drivers/r600/radeon_video.c | 4 ++--
src/gallium/drivers/radeonsi/si_buffer.c | 2 +-
src/gallium/drivers/radeonsi/si_texture.c | 4 ++--
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 14 +++++++-------
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 8 ++++----
src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c | 2 +-
src/gallium/winsys/svga/drm/vmw_buffer.c | 2 +-
17 files changed, 38 insertions(+), 32 deletions(-)
diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer.h b/src/gallium/auxiliary/pipebuffer/pb_buffer.h
index ac6d9406df9..6ae26e1df17 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_buffer.h
+++ b/src/gallium/auxiliary/pipebuffer/pb_buffer.h
@@ -111,7 +111,13 @@ typedef uint64_t pb_size;
struct pb_buffer
{
struct pipe_reference reference;
- unsigned alignment;
+
+ /* Alignments are powers of two, so store only the bit position.
+ * alignment_log2 = util_logbase2(alignment);
+ * alignment = 1 << alignment_log2;
+ */
+ uint8_t alignment_log2;
+
pb_size size;
/**
diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
index 01f0ed6077b..55106f17166 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
@@ -908,7 +908,7 @@ fenced_bufmgr_create_buffer(struct pb_manager *mgr,
goto no_buffer;
pipe_reference_init(&fenced_buf->base.reference, 1);
- fenced_buf->base.alignment = desc->alignment;
+ fenced_buf->base.alignment_log2 = util_logbase2(desc->alignment);
fenced_buf->base.usage = desc->usage;
fenced_buf->base.size = size;
fenced_buf->size = size;
diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c
index c4c1785cfc0..ee87663ba25 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c
@@ -232,11 +232,11 @@ pb_cache_manager_create_buffer(struct pb_manager *_mgr,
}
assert(pipe_is_referenced(&buf->buffer->reference));
- assert(pb_check_alignment(desc->alignment, buf->buffer->alignment));
+ assert(pb_check_alignment(desc->alignment, 1 << buf->buffer->alignment_log2));
assert(buf->buffer->size >= size);
pipe_reference_init(&buf->base.reference, 1);
- buf->base.alignment = buf->buffer->alignment;
+ buf->base.alignment_log2 = buf->buffer->alignment_log2;
buf->base.usage = buf->buffer->usage;
buf->base.size = buf->buffer->size;
diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c
index b0f591b3f12..43007a3b34e 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c
@@ -399,12 +399,12 @@ pb_debug_manager_create_buffer(struct pb_manager *_mgr,
}
assert(pipe_is_referenced(&buf->buffer->reference));
- assert(pb_check_alignment(real_desc.alignment, buf->buffer->alignment));
+ assert(pb_check_alignment(real_desc.alignment, 1 << buf->buffer->alignment_log2));
assert(pb_check_usage(real_desc.usage, buf->buffer->usage));
assert(buf->buffer->size >= real_size);
pipe_reference_init(&buf->base.reference, 1);
- buf->base.alignment = desc->alignment;
+ buf->base.alignment_log2 = util_logbase2(desc->alignment);
buf->base.usage = desc->usage;
buf->base.size = size;
diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c
index d5ef779c6b0..0ab1c876086 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c
@@ -193,7 +193,7 @@ mm_bufmgr_create_buffer(struct pb_manager *mgr,
}
pipe_reference_init(&mm_buf->base.reference, 1);
- mm_buf->base.alignment = desc->alignment;
+ mm_buf->base.alignment_log2 = util_logbase2(desc->alignment);
mm_buf->base.usage = desc->usage;
mm_buf->base.size = size;
diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c
index 69a19695086..99880e826d2 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c
@@ -339,7 +339,7 @@ pb_slab_create(struct pb_slab_manager *mgr)
for (i=0; i < numBuffers; ++i) {
pipe_reference_init(&buf->base.reference, 0);
buf->base.size = mgr->bufSize;
- buf->base.alignment = 0;
+ buf->base.alignment_log2 = 0;
buf->base.usage = 0;
buf->base.vtbl = &pb_slab_buffer_vtbl;
buf->slab = slab;
@@ -416,7 +416,7 @@ pb_slab_manager_create_buffer(struct pb_manager *_mgr,
buf = LIST_ENTRY(struct pb_slab_buffer, list, head);
pipe_reference_init(&buf->base.reference, 1);
- buf->base.alignment = desc->alignment;
+ buf->base.alignment_log2 = util_logbase2(desc->alignment);
buf->base.usage = desc->usage;
return &buf->base;
diff --git a/src/gallium/auxiliary/pipebuffer/pb_cache.c b/src/gallium/auxiliary/pipebuffer/pb_cache.c
index 9d201a9b93a..515761997d0 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_cache.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_cache.c
@@ -133,7 +133,7 @@ pb_cache_is_buffer_compat(struct pb_cache_entry *entry,
if (usage & mgr->bypass_usage)
return 0;
- if (!pb_check_alignment(alignment, buf->alignment))
+ if (!pb_check_alignment(alignment, 1 << buf->alignment_log2))
return 0;
return mgr->can_reclaim(mgr->winsys, buf) ? 1 : -1;
diff --git a/src/gallium/drivers/d3d12/d3d12_bufmgr.cpp b/src/gallium/drivers/d3d12/d3d12_bufmgr.cpp
index 3946540c37d..8e37990860c 100644
--- a/src/gallium/drivers/d3d12/d3d12_bufmgr.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_bufmgr.cpp
@@ -286,7 +286,7 @@ d3d12_bufmgr_create_buffer(struct pb_manager *pmgr,
size = align64(size, D3D12_CONSTANT_BUFFER_DATA_PLACEMENT_ALIGNMENT);
pipe_reference_init(&buf->base.reference, 1);
- buf->base.alignment = pb_desc->alignment;
+ buf->base.alignment_log2 = util_logbase2(pb_desc->alignment);
buf->base.usage = pb_desc->usage;
buf->base.vtbl = &d3d12_buffer_vtbl;
buf->base.size = size;
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 50870a38bda..56796244cfd 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -982,7 +982,7 @@ static void r600_init_color_surface(struct r600_context *rctx,
/* CMASK. */
if (!rctx->dummy_cmask ||
rctx->dummy_cmask->b.b.width0 < cmask.size ||
- rctx->dummy_cmask->buf->alignment % cmask.alignment != 0) {
+ (1 << rctx->dummy_cmask->buf->alignment_log2) % cmask.alignment != 0) {
struct pipe_transfer *transfer;
void *ptr;
@@ -1007,7 +1007,7 @@ static void r600_init_color_surface(struct r600_context *rctx,
/* FMASK. */
if (!rctx->dummy_fmask ||
rctx->dummy_fmask->b.b.width0 < fmask.size ||
- rctx->dummy_fmask->buf->alignment % fmask.alignment != 0) {
+ (1 << rctx->dummy_fmask->buf->alignment_log2) % fmask.alignment != 0) {
r600_resource_reference(&rctx->dummy_fmask, NULL);
rctx->dummy_fmask = (struct r600_resource*)
r600_aligned_buffer_create(&rscreen->b.b, 0,
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index 6d9a05364a2..afa44af5d2b 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -981,7 +981,7 @@ r600_texture_create_object(struct pipe_screen *screen,
resource->buf = buf;
resource->gpu_address = rscreen->ws->buffer_get_virtual_address(resource->buf);
resource->bo_size = buf->size;
- resource->bo_alignment = buf->alignment;
+ resource->bo_alignment = 1 << buf->alignment_log2;
resource->domains = rscreen->ws->buffer_get_initial_domain(resource->buf);
if (resource->domains & RADEON_DOMAIN_VRAM)
resource->vram_usage = buf->size;
diff --git a/src/gallium/drivers/r600/radeon_video.c b/src/gallium/drivers/r600/radeon_video.c
index 9bd4233cc5a..a49c0a0120d 100644
--- a/src/gallium/drivers/r600/radeon_video.c
+++ b/src/gallium/drivers/r600/radeon_video.c
@@ -189,9 +189,9 @@ void rvid_join_surfaces(struct r600_common_context *rctx,
if (!buffers[i] || !*buffers[i])
continue;
- size = align(size, (*buffers[i])->alignment);
+ size = align(size, 1 << (*buffers[i])->alignment_log2);
size += (*buffers[i])->size;
- alignment = MAX2(alignment, (*buffers[i])->alignment * 1);
+ alignment = MAX2(alignment, 1 << (*buffers[i])->alignment_log2);
}
if (!size)
diff --git a/src/gallium/drivers/radeonsi/si_buffer.c b/src/gallium/drivers/radeonsi/si_buffer.c
index 899d3f4956e..5a9d7b9473e 100644
--- a/src/gallium/drivers/radeonsi/si_buffer.c
+++ b/src/gallium/drivers/radeonsi/si_buffer.c
@@ -667,7 +667,7 @@ struct pipe_resource *si_buffer_from_winsys_buffer(struct pipe_screen *screen,
res->buf = imported_buf;
res->gpu_address = sscreen->ws->buffer_get_virtual_address(res->buf);
res->bo_size = imported_buf->size;
- res->bo_alignment = imported_buf->alignment;
+ res->bo_alignment = 1 << imported_buf->alignment_log2;
res->domains = sscreen->ws->buffer_get_initial_domain(res->buf);
if (res->domains & RADEON_DOMAIN_VRAM)
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index 8a02fd6f071..a301a32272f 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -1008,7 +1008,7 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen,
resource->buf = imported_buf;
resource->gpu_address = sscreen->ws->buffer_get_virtual_address(resource->buf);
resource->bo_size = imported_buf->size;
- resource->bo_alignment = imported_buf->alignment;
+ resource->bo_alignment = 1 << imported_buf->alignment_log2;
resource->domains = sscreen->ws->buffer_get_initial_domain(resource->buf);
if (resource->domains & RADEON_DOMAIN_VRAM)
resource->vram_usage_kb = MAX2(1, resource->bo_size / 1024);
@@ -1625,7 +1625,7 @@ static struct pipe_resource *si_texture_from_winsys_buffer(struct si_screen *ssc
if (ac_surface_get_plane_offset(sscreen->info.chip_class, &tex->surface, 0, 0) +
tex->surface.total_size > buf->size ||
- buf->alignment < tex->surface.alignment) {
+ 1 << buf->alignment_log2 < tex->surface.alignment) {
si_texture_reference(&tex, NULL);
return NULL;
}
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index 6ee02ef8d7b..6cadfaa4313 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -592,7 +592,7 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws,
simple_mtx_init(&bo->lock, mtx_plain);
pipe_reference_init(&bo->base.reference, 1);
- bo->base.alignment = alignment;
+ bo->base.alignment_log2 = util_logbase2(alignment);
bo->base.size = size;
bo->base.vtbl = &amdgpu_winsys_bo_vtbl;
bo->bo = buf_handle;
@@ -656,7 +656,7 @@ static struct pb_slabs *get_slabs(struct amdgpu_winsys *ws, uint64_t size,
static unsigned get_slab_wasted_size(struct amdgpu_winsys *ws, struct amdgpu_winsys_bo *bo)
{
assert(bo->base.size <= bo->u.slab.entry.entry_size);
- assert(bo->base.size < bo->base.alignment ||
+ assert(bo->base.size < (1 << bo->base.alignment_log2) ||
bo->base.size < 1 << ws->bo_slabs[0].min_order ||
bo->base.size > bo->u.slab.entry.entry_size / 2);
return bo->u.slab.entry.entry_size - bo->base.size;
@@ -788,7 +788,7 @@ static struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap,
struct amdgpu_winsys_bo *bo = &slab->entries[i];
simple_mtx_init(&bo->lock, mtx_plain);
- bo->base.alignment = get_slab_entry_alignment(ws, entry_size);
+ bo->base.alignment_log2 = util_logbase2(get_slab_entry_alignment(ws, entry_size));
bo->base.size = entry_size;
bo->base.vtbl = &amdgpu_winsys_bo_slab_vtbl;
bo->va = slab->buffer->va + i * entry_size;
@@ -1149,7 +1149,7 @@ amdgpu_bo_sparse_create(struct amdgpu_winsys *ws, uint64_t size,
simple_mtx_init(&bo->lock, mtx_plain);
pipe_reference_init(&bo->base.reference, 1);
- bo->base.alignment = RADEON_SPARSE_PAGE_SIZE;
+ bo->base.alignment_log2 = util_logbase2(RADEON_SPARSE_PAGE_SIZE);
bo->base.size = size;
bo->base.vtbl = &amdgpu_winsys_bo_sparse_vtbl;
bo->base.placement = domain;
@@ -1435,7 +1435,7 @@ amdgpu_bo_create(struct amdgpu_winsys *ws,
bo = container_of(entry, struct amdgpu_winsys_bo, u.slab.entry);
pipe_reference_init(&bo->base.reference, 1);
bo->base.size = size;
- assert(alignment <= bo->base.alignment);
+ assert(alignment <= 1 << bo->base.alignment_log2);
if (domain & RADEON_DOMAIN_VRAM)
ws->slab_wasted_vram += get_slab_wasted_size(ws, bo);
@@ -1591,7 +1591,7 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws,
/* Initialize the structure. */
simple_mtx_init(&bo->lock, mtx_plain);
pipe_reference_init(&bo->base.reference, 1);
- bo->base.alignment = info.phys_alignment;
+ bo->base.alignment_log2 = util_logbase2(info.phys_alignment);
bo->bo = result.buf_handle;
bo->base.size = result.alloc_size;
bo->base.vtbl = &amdgpu_winsys_bo_vtbl;
@@ -1741,7 +1741,7 @@ static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws,
pipe_reference_init(&bo->base.reference, 1);
simple_mtx_init(&bo->lock, mtx_plain);
bo->bo = buf_handle;
- bo->base.alignment = 0;
+ bo->base.alignment_log2 = 0;
bo->base.size = size;
bo->base.vtbl = &amdgpu_winsys_bo_vtbl;
bo->u.real.cpu_ptr = pointer;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index e31c1a92334..6c424a71380 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -669,7 +669,7 @@ static struct radeon_bo *radeon_create_bo(struct radeon_drm_winsys *rws,
return NULL;
pipe_reference_init(&bo->base.reference, 1);
- bo->base.alignment = alignment;
+ bo->base.alignment_log2 = util_logbase2(alignment);
bo->base.usage = 0;
bo->base.size = size;
bo->base.vtbl = &radeon_bo_vtbl;
@@ -804,7 +804,7 @@ struct pb_slab *radeon_bo_slab_alloc(void *priv, unsigned heap,
for (unsigned i = 0; i < slab->base.num_entries; ++i) {
struct radeon_bo *bo = &slab->entries[i];
- bo->base.alignment = entry_size;
+ bo->base.alignment_log2 = util_logbase2(entry_size);
bo->base.usage = slab->buffer->base.usage;
bo->base.size = entry_size;
bo->base.vtbl = &radeon_winsys_bo_slab_vtbl;
@@ -1130,7 +1130,7 @@ static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws,
/* Initialize it. */
pipe_reference_init(&bo->base.reference, 1);
bo->handle = args.handle;
- bo->base.alignment = 0;
+ bo->base.alignment_log2 = 0;
bo->base.size = size;
bo->base.vtbl = &radeon_bo_vtbl;
bo->rws = ws;
@@ -1259,7 +1259,7 @@ static struct pb_buffer *radeon_winsys_bo_from_handle(struct radeon_winsys *rws,
/* Initialize it. */
pipe_reference_init(&bo->base.reference, 1);
- bo->base.alignment = 0;
+ bo->base.alignment_log2 = 0;
bo->base.size = (unsigned) size;
bo->base.vtbl = &radeon_bo_vtbl;
bo->rws = ws;
diff --git a/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c b/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c
index 7811dfbcfa1..8cf95bb9891 100644
--- a/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c
+++ b/src/gallium/winsys/svga/drm/pb_buffer_simple_fenced.c
@@ -731,7 +731,7 @@ fenced_bufmgr_create_buffer(struct pb_manager *mgr,
goto no_buffer;
pipe_reference_init(&fenced_buf->base.reference, 1);
- fenced_buf->base.alignment = desc->alignment;
+ fenced_buf->base.alignment_log2 = util_logbase2(desc->alignment);
fenced_buf->base.usage = desc->usage;
fenced_buf->base.size = size;
fenced_buf->size = size;
diff --git a/src/gallium/winsys/svga/drm/vmw_buffer.c b/src/gallium/winsys/svga/drm/vmw_buffer.c
index 4c44cb517e4..d537c8be96e 100644
--- a/src/gallium/winsys/svga/drm/vmw_buffer.c
+++ b/src/gallium/winsys/svga/drm/vmw_buffer.c
@@ -222,7 +222,7 @@ vmw_gmr_bufmgr_create_buffer(struct pb_manager *_mgr,
goto error1;
pipe_reference_init(&buf->base.reference, 1);
- buf->base.alignment = pb_desc->alignment;
+ buf->base.alignment_log2 = util_logbase2(pb_desc->alignment);
buf->base.usage = pb_desc->usage & ~VMW_BUFFER_USAGE_SHARED;
buf->base.vtbl = &vmw_gmr_buffer_vtbl;
buf->mgr = mgr;
More information about the mesa-commit
mailing list