Mesa (master): radv: remove second nir_lower_idiv

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Module: Mesa
Branch: master
Commit: 7db8d307bcb7cad8e4cb27a4d73212e73d895a3a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7db8d307bcb7cad8e4cb27a4d73212e73d895a3a

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Wed Apr  7 19:58:19 2021 +0100

radv: remove second nir_lower_idiv

nir_lower_idiv now lowers 8/16-bit divisions.

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>

---

 src/amd/vulkan/radv_pipeline.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 71b2aaca605..168ee087579 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3072,14 +3072,9 @@ lower_bit_size_callback(const nir_instr *instr, void *_)
       switch (alu->op) {
       case nir_op_iabs:
       case nir_op_bitfield_select:
-      case nir_op_udiv:
-      case nir_op_idiv:
-      case nir_op_umod:
-      case nir_op_imod:
       case nir_op_imul_high:
       case nir_op_umul_high:
       case nir_op_ineg:
-      case nir_op_irem:
       case nir_op_isign:
          return 32;
       case nir_op_imax:
@@ -3369,9 +3364,6 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
             }
 
             if (nir_lower_bit_size(nir[i], lower_bit_size_callback, device)) {
-               // TODO: lower idiv beforehand
-               if (nir_lower_idiv(nir[i], nir_lower_idiv_precise))
-                  NIR_PASS_V(nir[i], nir_opt_algebraic_late); /* needed for removing ineg again */
                NIR_PASS_V(nir[i], nir_opt_constant_folding);
                NIR_PASS_V(nir[i], nir_opt_dce);
             }