Mesa (master): anv: Avoid corrupting indirect depth clear values
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Wed Apr 14 21:10:20 UTC 2021
Module: Mesa
Branch: master
Commit: be2d9c113b070c7783f106821d0ad558898b7d4b
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=be2d9c113b070c7783f106821d0ad558898b7d4b
Author: Sagar Ghuge <sagar.ghuge at intel.com>
Date: Wed Apr 7 14:05:21 2021 -0700
anv: Avoid corrupting indirect depth clear values
We don't need to initialize the BO since blorp updates the clear color
BO content with fast clear value i.e ANV_HZ_FC_VAL for depth surface.
With this approach, we can get rid of possibility of corruption since we
are no longer sharing the same clear BO for depth formats.
Closes: #3614
Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9941>
---
src/intel/vulkan/anv_blorp.c | 15 +++------------
src/intel/vulkan/anv_device.c | 36 ++----------------------------------
src/intel/vulkan/anv_image.c | 27 +++++++++++----------------
src/intel/vulkan/anv_private.h | 4 ++--
4 files changed, 18 insertions(+), 64 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 0113b1e7de6..f985bf50922 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -257,18 +257,9 @@ get_blorp_surf_for_anv_image(const struct anv_device *device,
anv_image_get_clear_color_addr(device, image, aspect);
blorp_surf->clear_color_addr = anv_to_blorp_address(clear_color_addr);
} else if (aspect & VK_IMAGE_ASPECT_DEPTH_BIT) {
- if (device->info.ver >= 10) {
- /* Vulkan always clears to 1.0. On gen < 10, we set that directly
- * in the state packet. For gen >= 10, must provide the clear
- * value in a buffer. We have a single global buffer that stores
- * the 1.0 value.
- */
- const struct anv_address clear_color_addr = (struct anv_address) {
- .bo = device->hiz_clear_bo,
- };
- blorp_surf->clear_color_addr =
- anv_to_blorp_address(clear_color_addr);
- }
+ const struct anv_address clear_color_addr =
+ anv_image_get_clear_color_addr(device, image, aspect);
+ blorp_surf->clear_color_addr = anv_to_blorp_address(clear_color_addr);
blorp_surf->clear_color = (union isl_color_value) {
.f32 = { ANV_HZ_FC_VAL },
};
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index a53b4e315cf..bfcf95e9c9c 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -2772,27 +2772,6 @@ vk_priority_to_gen(int priority)
}
}
-static VkResult
-anv_device_init_hiz_clear_value_bo(struct anv_device *device)
-{
- VkResult result = anv_device_alloc_bo(device, "hiz-clear-value", 4096,
- ANV_BO_ALLOC_MAPPED,
- 0 /* explicit_address */,
- &device->hiz_clear_bo);
- if (result != VK_SUCCESS)
- return result;
-
- union isl_color_value hiz_clear = { .u32 = { 0, } };
- hiz_clear.f32[0] = ANV_HZ_FC_VAL;
-
- memcpy(device->hiz_clear_bo->map, hiz_clear.u32, sizeof(hiz_clear.u32));
-
- if (!device->info.has_llc)
- gen_clflush_range(device->hiz_clear_bo->map, sizeof(hiz_clear.u32));
-
- return VK_SUCCESS;
-}
-
static bool
get_bo_from_pool(struct intel_batch_decode_bo *ret,
struct anv_block_pool *pool,
@@ -3255,17 +3234,11 @@ VkResult anv_CreateDevice(
isl_extent3d(1, 1, 1) /* This shouldn't matter */);
assert(device->null_surface_state.offset == 0);
- if (device->info.ver >= 10) {
- result = anv_device_init_hiz_clear_value_bo(device);
- if (result != VK_SUCCESS)
- goto fail_trivial_batch_bo;
- }
-
anv_scratch_pool_init(device, &device->scratch_pool);
result = anv_genX(&device->info, init_device_state)(device);
if (result != VK_SUCCESS)
- goto fail_clear_value_bo;
+ goto fail_trivial_batch_bo_and_scratch_pool;
anv_pipeline_cache_init(&device->default_pipeline_cache, device,
true /* cache_enabled */, false /* external_sync */);
@@ -3280,11 +3253,8 @@ VkResult anv_CreateDevice(
return VK_SUCCESS;
- fail_clear_value_bo:
- if (device->info.ver >= 10)
- anv_device_release_bo(device, device->hiz_clear_bo);
+ fail_trivial_batch_bo_and_scratch_pool:
anv_scratch_pool_finish(device, &device->scratch_pool);
- fail_trivial_batch_bo:
anv_device_release_bo(device, device->trivial_batch_bo);
fail_workaround_bo:
anv_device_release_bo(device, device->workaround_bo);
@@ -3362,8 +3332,6 @@ void anv_DestroyDevice(
anv_device_release_bo(device, device->workaround_bo);
anv_device_release_bo(device, device->trivial_batch_bo);
- if (device->info.ver >= 10)
- anv_device_release_bo(device, device->hiz_clear_bo);
if (device->info.has_aux_map) {
intel_aux_map_finish(device->aux_map_ctx);
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 2cc7d5b6fa7..86e164ffd38 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -459,7 +459,8 @@ add_aux_state_tracking_buffer(struct anv_device *device,
{
assert(image && device);
assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
- image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
+ image->aspects & (VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV |
+ VK_IMAGE_ASPECT_DEPTH_BIT));
const unsigned clear_color_state_size = device->info.ver >= 10 ?
device->isl_dev.ss.clear_color_state_size :
@@ -578,9 +579,14 @@ add_aux_surface_if_supported(struct anv_device *device,
image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS;
}
- return add_surface(device, image, &image->planes[plane].aux_surface,
- ANV_IMAGE_MEMORY_BINDING_PLANE_0 + plane,
- ANV_OFFSET_IMPLICIT);
+ result = add_surface(device, image, &image->planes[plane].aux_surface,
+ ANV_IMAGE_MEMORY_BINDING_PLANE_0 + plane,
+ ANV_OFFSET_IMPLICIT);
+ if (result != VK_SUCCESS)
+ return result;
+
+ if (image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT)
+ return add_aux_state_tracking_buffer(device, image, plane);
} else if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
if (INTEL_DEBUG & DEBUG_NO_RBC)
@@ -903,10 +909,6 @@ check_memory_bindings(const struct anv_device *device,
}
/* Check fast clear state */
- assert((plane->fast_clear_memory_range.size > 0) ==
- (plane->aux_usage != ISL_AUX_USAGE_NONE &&
- image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV));
-
if (plane->fast_clear_memory_range.size > 0) {
enum anv_image_memory_binding binding = primary_binding;
@@ -2575,14 +2577,7 @@ anv_image_fill_surface_state(struct anv_device *device,
struct anv_address clear_address = ANV_NULL_ADDRESS;
if (device->info.ver >= 10 && isl_aux_usage_has_fast_clears(aux_usage)) {
- if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
- clear_address = (struct anv_address) {
- .bo = device->hiz_clear_bo,
- .offset = 0,
- };
- } else {
- clear_address = anv_image_get_clear_color_addr(device, image, aspect);
- }
+ clear_address = anv_image_get_clear_color_addr(device, image, aspect);
}
state_inout->clear_address = clear_address;
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 44ce29127f8..205eca771c8 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1223,7 +1223,6 @@ struct anv_device {
struct anv_address workaround_address;
struct anv_bo * trivial_batch_bo;
- struct anv_bo * hiz_clear_bo;
struct anv_state null_surface_state;
struct anv_pipeline_cache default_pipeline_cache;
@@ -3844,7 +3843,8 @@ anv_image_get_clear_color_addr(UNUSED const struct anv_device *device,
const struct anv_image *image,
VkImageAspectFlagBits aspect)
{
- assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
+ assert(image->aspects & (VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV |
+ VK_IMAGE_ASPECT_DEPTH_BIT));
uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
const struct anv_image_memory_range *mem_range =
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