Mesa (master): intel/fs: Disable 3-src immediates on XeHP.

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 262cb08557550dc9276522649b2ce1acd15df560
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=262cb08557550dc9276522649b2ce1acd15df560

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Tue Apr  6 13:11:09 2021 -0700

intel/fs: Disable 3-src immediates on XeHP.

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>

[ Francisco Jerez: Add TODO comment explaining why this is helpful and
  how we could better fix it. ]

Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10000>

---

 src/intel/compiler/brw_fs_combine_constants.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_fs_combine_constants.cpp b/src/intel/compiler/brw_fs_combine_constants.cpp
index a0988ae7589..38a503ece4b 100644
--- a/src/intel/compiler/brw_fs_combine_constants.cpp
+++ b/src/intel/compiler/brw_fs_combine_constants.cpp
@@ -339,8 +339,10 @@ static bool
 represent_src_as_imm(const struct gen_device_info *devinfo,
                      fs_reg *src)
 {
-   /* TODO : consider specific platforms also */
-   if (devinfo->ver == 12) {
+   /* TODO - Fix the codepath below to use a bfloat16 immediate on XeHP,
+    *        since HF/F mixed mode has been removed from the hardware.
+    */
+   if (devinfo->ver == 12 && devinfo->verx10 < 125) {
       uint16_t hf;
       if (representable_as_hf(src->f, &hf)) {
          *src = retype(brw_imm_uw(hf), BRW_REGISTER_TYPE_HF);