Mesa (master): amd/registers: rename IMG_FORMAT to GFX10_FORMAT to disambiguate the meaning
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Sat Apr 17 02:52:48 UTC 2021
Module: Mesa
Branch: master
Commit: ec1ddb976a133bc6e504693373b0920e28ab2868
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec1ddb976a133bc6e504693373b0920e28ab2868
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sun Mar 28 05:11:09 2021 -0400
amd/registers: rename IMG_FORMAT to GFX10_FORMAT to disambiguate the meaning
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10261>
---
src/amd/common/ac_shader_util.c | 30 +-
src/amd/common/gfx10_format_table.py | 9 +-
src/amd/compiler/aco_instruction_selection.cpp | 6 +-
src/amd/compiler/aco_spill.cpp | 2 +-
src/amd/registers/gfx10-rsrc.json | 328 ++++++++++-----------
src/amd/vulkan/radv_cmd_buffer.c | 6 +-
src/amd/vulkan/radv_descriptor_set.c | 2 +-
src/amd/vulkan/radv_device.c | 12 +-
src/amd/vulkan/radv_image.c | 6 +-
src/amd/vulkan/radv_nir_to_llvm.c | 2 +-
.../drivers/radeonsi/si_compute_prim_discard.c | 8 +-
src/gallium/drivers/radeonsi/si_descriptors.c | 6 +-
src/gallium/drivers/radeonsi/si_shader_llvm_gs.c | 2 +-
.../drivers/radeonsi/si_shader_llvm_resources.c | 2 +-
src/gallium/drivers/radeonsi/si_shader_llvm_tess.c | 2 +-
src/gallium/drivers/radeonsi/si_state.c | 30 +-
16 files changed, 226 insertions(+), 227 deletions(-)
diff --git a/src/amd/common/ac_shader_util.c b/src/amd/common/ac_shader_util.c
index 5cab8817177..ad6d026a0f3 100644
--- a/src/amd/common/ac_shader_util.c
+++ b/src/amd/common/ac_shader_util.c
@@ -109,8 +109,8 @@ unsigned ac_get_tbuffer_format(enum chip_class chip_class, unsigned dfmt, unsign
{
// Some games try to access vertex buffers without a valid format.
// This is a game bug, but we should still handle it gracefully.
- if (dfmt == V_008F0C_IMG_FORMAT_INVALID)
- return V_008F0C_IMG_FORMAT_INVALID;
+ if (dfmt == V_008F0C_GFX10_FORMAT_INVALID)
+ return V_008F0C_GFX10_FORMAT_INVALID;
if (chip_class >= GFX10) {
unsigned format;
@@ -118,43 +118,43 @@ unsigned ac_get_tbuffer_format(enum chip_class chip_class, unsigned dfmt, unsign
default:
unreachable("bad dfmt");
case V_008F0C_BUF_DATA_FORMAT_INVALID:
- format = V_008F0C_IMG_FORMAT_INVALID;
+ format = V_008F0C_GFX10_FORMAT_INVALID;
break;
case V_008F0C_BUF_DATA_FORMAT_8:
- format = V_008F0C_IMG_FORMAT_8_UINT;
+ format = V_008F0C_GFX10_FORMAT_8_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_8_8:
- format = V_008F0C_IMG_FORMAT_8_8_UINT;
+ format = V_008F0C_GFX10_FORMAT_8_8_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_8_8_8_8:
- format = V_008F0C_IMG_FORMAT_8_8_8_8_UINT;
+ format = V_008F0C_GFX10_FORMAT_8_8_8_8_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_16:
- format = V_008F0C_IMG_FORMAT_16_UINT;
+ format = V_008F0C_GFX10_FORMAT_16_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_16_16:
- format = V_008F0C_IMG_FORMAT_16_16_UINT;
+ format = V_008F0C_GFX10_FORMAT_16_16_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_16_16_16_16:
- format = V_008F0C_IMG_FORMAT_16_16_16_16_UINT;
+ format = V_008F0C_GFX10_FORMAT_16_16_16_16_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_32:
- format = V_008F0C_IMG_FORMAT_32_UINT;
+ format = V_008F0C_GFX10_FORMAT_32_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_32_32:
- format = V_008F0C_IMG_FORMAT_32_32_UINT;
+ format = V_008F0C_GFX10_FORMAT_32_32_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_32_32_32:
- format = V_008F0C_IMG_FORMAT_32_32_32_UINT;
+ format = V_008F0C_GFX10_FORMAT_32_32_32_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_32_32_32_32:
- format = V_008F0C_IMG_FORMAT_32_32_32_32_UINT;
+ format = V_008F0C_GFX10_FORMAT_32_32_32_32_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_2_10_10_10:
- format = V_008F0C_IMG_FORMAT_2_10_10_10_UINT;
+ format = V_008F0C_GFX10_FORMAT_2_10_10_10_UINT;
break;
case V_008F0C_BUF_DATA_FORMAT_10_11_11:
- format = V_008F0C_IMG_FORMAT_10_11_11_UINT;
+ format = V_008F0C_GFX10_FORMAT_10_11_11_UINT;
break;
}
diff --git a/src/amd/common/gfx10_format_table.py b/src/amd/common/gfx10_format_table.py
index f24b0e3652a..83c21199d3e 100644
--- a/src/amd/common/gfx10_format_table.py
+++ b/src/amd/common/gfx10_format_table.py
@@ -21,8 +21,7 @@
# USE OR OTHER DEALINGS IN THE SOFTWARE.
#
"""
-Script that generates the mapping from Gallium PIPE_FORMAT_xxx to gfx10
-IMG_FORMAT_xxx enums.
+Script that generates the mapping from Gallium PIPE_FORMAT_xxx to GFX10_FORMAT_xxx enums.
"""
from __future__ import absolute_import, division, print_function, unicode_literals
@@ -112,7 +111,7 @@ header_template = mako.template.Template("""\
#include "amdgfxregs.h"
#define FMT(_img_format, ...) \
- { .img_format = V_008F0C_IMG_FORMAT_##_img_format, \
+ { .img_format = V_008F0C_GFX10_FORMAT_##_img_format, \
##__VA_ARGS__ }
const struct gfx10_format gfx10_format_table[PIPE_FORMAT_COUNT] = {
@@ -130,7 +129,7 @@ class Gfx10Format(object):
RE_plain_channel = re.compile(r'X?([0-9]+)')
def __init__(self, enum_entry):
- self.img_format = enum_entry.name[11:]
+ self.img_format = enum_entry.name[13:]
self.flags = getattr(enum_entry, 'flags', [])
code = self.img_format.split('_')
@@ -258,7 +257,7 @@ if __name__ == '__main__':
with open(sys.argv[2], 'r') as filp:
db = RegisterDatabase.from_json(json.load(filp))
- gfx10_formats = [Gfx10Format(entry) for entry in db.enum('IMG_FORMAT').entries]
+ gfx10_formats = [Gfx10Format(entry) for entry in db.enum('GFX10_FORMAT').entries]
mapping = Gfx10FormatMapping(pipe_formats, gfx10_formats)
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 72aca4575b4..39832a35887 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -5077,7 +5077,7 @@ void visit_load_ubo(isel_context *ctx, nir_intrinsic_instr *instr)
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (ctx->options->chip_class >= GFX10) {
- desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc_type |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
S_008F0C_RESOURCE_LEVEL(1);
} else {
@@ -5201,7 +5201,7 @@ void visit_load_constant(isel_context *ctx, nir_intrinsic_instr *instr)
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (ctx->options->chip_class >= GFX10) {
- desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc_type |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
S_008F0C_RESOURCE_LEVEL(1);
} else {
@@ -6872,7 +6872,7 @@ Temp get_scratch_resource(isel_context *ctx)
S_008F0C_INDEX_STRIDE(ctx->program->wave_size == 64 ? 3 : 2);
if (ctx->program->chip_class >= GFX10) {
- rsrc_conf |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ rsrc_conf |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
S_008F0C_RESOURCE_LEVEL(1);
} else if (ctx->program->chip_class <= GFX7) { /* dfmt modifies stride on GFX8/GFX9 when ADD_TID_EN=1 */
diff --git a/src/amd/compiler/aco_spill.cpp b/src/amd/compiler/aco_spill.cpp
index 5988b866eed..af21128d3cb 100644
--- a/src/amd/compiler/aco_spill.cpp
+++ b/src/amd/compiler/aco_spill.cpp
@@ -1275,7 +1275,7 @@ Temp load_scratch_resource(spill_ctx& ctx, Temp& scratch_offset,
S_008F0C_INDEX_STRIDE(ctx.program->wave_size == 64 ? 3 : 2);
if (ctx.program->chip_class >= GFX10) {
- rsrc_conf |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ rsrc_conf |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
S_008F0C_RESOURCE_LEVEL(1);
} else if (ctx.program->chip_class <= GFX7) { /* dfmt modifies stride on GFX8/GFX9 when ADD_TID_EN=1 */
diff --git a/src/amd/registers/gfx10-rsrc.json b/src/amd/registers/gfx10-rsrc.json
index 0427836222b..954226bf75d 100644
--- a/src/amd/registers/gfx10-rsrc.json
+++ b/src/amd/registers/gfx10-rsrc.json
@@ -1,167 +1,167 @@
{
"enums": {
- "IMG_FORMAT": {
+ "GFX10_FORMAT": {
"entries": [
- {"name": "IMG_FORMAT_INVALID", "value": 0},
- {"name": "IMG_FORMAT_8_UNORM", "value": 1},
- {"name": "IMG_FORMAT_8_SNORM", "value": 2},
- {"name": "IMG_FORMAT_8_USCALED", "value": 3},
- {"name": "IMG_FORMAT_8_SSCALED", "value": 4},
- {"name": "IMG_FORMAT_8_UINT", "value": 5},
- {"name": "IMG_FORMAT_8_SINT", "value": 6},
- {"name": "IMG_FORMAT_16_UNORM", "value": 7},
- {"name": "IMG_FORMAT_16_SNORM", "value": 8},
- {"name": "IMG_FORMAT_16_USCALED", "value": 9},
- {"name": "IMG_FORMAT_16_SSCALED", "value": 10},
- {"name": "IMG_FORMAT_16_UINT", "value": 11},
- {"name": "IMG_FORMAT_16_SINT", "value": 12},
- {"name": "IMG_FORMAT_16_FLOAT", "value": 13},
- {"name": "IMG_FORMAT_8_8_UNORM", "value": 14},
- {"name": "IMG_FORMAT_8_8_SNORM", "value": 15},
- {"name": "IMG_FORMAT_8_8_USCALED", "value": 16},
- {"name": "IMG_FORMAT_8_8_SSCALED", "value": 17},
- {"name": "IMG_FORMAT_8_8_UINT", "value": 18},
- {"name": "IMG_FORMAT_8_8_SINT", "value": 19},
- {"name": "IMG_FORMAT_32_UINT", "value": 20},
- {"name": "IMG_FORMAT_32_SINT", "value": 21},
- {"name": "IMG_FORMAT_32_FLOAT", "value": 22},
- {"name": "IMG_FORMAT_16_16_UNORM", "value": 23},
- {"name": "IMG_FORMAT_16_16_SNORM", "value": 24},
- {"name": "IMG_FORMAT_16_16_USCALED", "value": 25},
- {"name": "IMG_FORMAT_16_16_SSCALED", "value": 26},
- {"name": "IMG_FORMAT_16_16_UINT", "value": 27},
- {"name": "IMG_FORMAT_16_16_SINT", "value": 28},
- {"name": "IMG_FORMAT_16_16_FLOAT", "value": 29},
- {"name": "IMG_FORMAT_10_11_11_UNORM", "value": 30},
- {"name": "IMG_FORMAT_10_11_11_SNORM", "value": 31},
- {"name": "IMG_FORMAT_10_11_11_USCALED", "value": 32},
- {"name": "IMG_FORMAT_10_11_11_SSCALED", "value": 33},
- {"name": "IMG_FORMAT_10_11_11_UINT", "value": 34},
- {"name": "IMG_FORMAT_10_11_11_SINT", "value": 35},
- {"name": "IMG_FORMAT_10_11_11_FLOAT", "value": 36},
- {"name": "IMG_FORMAT_11_11_10_UNORM", "value": 37},
- {"name": "IMG_FORMAT_11_11_10_SNORM", "value": 38},
- {"name": "IMG_FORMAT_11_11_10_USCALED", "value": 39},
- {"name": "IMG_FORMAT_11_11_10_SSCALED", "value": 40},
- {"name": "IMG_FORMAT_11_11_10_UINT", "value": 41},
- {"name": "IMG_FORMAT_11_11_10_SINT", "value": 42},
- {"name": "IMG_FORMAT_11_11_10_FLOAT", "value": 43},
- {"name": "IMG_FORMAT_10_10_10_2_UNORM", "value": 44},
- {"name": "IMG_FORMAT_10_10_10_2_SNORM", "value": 45},
- {"name": "IMG_FORMAT_10_10_10_2_USCALED", "value": 46},
- {"name": "IMG_FORMAT_10_10_10_2_SSCALED", "value": 47},
- {"name": "IMG_FORMAT_10_10_10_2_UINT", "value": 48},
- {"name": "IMG_FORMAT_10_10_10_2_SINT", "value": 49},
- {"name": "IMG_FORMAT_2_10_10_10_UNORM", "value": 50},
- {"name": "IMG_FORMAT_2_10_10_10_SNORM", "value": 51},
- {"name": "IMG_FORMAT_2_10_10_10_USCALED", "value": 52},
- {"name": "IMG_FORMAT_2_10_10_10_SSCALED", "value": 53},
- {"name": "IMG_FORMAT_2_10_10_10_UINT", "value": 54},
- {"name": "IMG_FORMAT_2_10_10_10_SINT", "value": 55},
- {"name": "IMG_FORMAT_8_8_8_8_UNORM", "value": 56},
- {"name": "IMG_FORMAT_8_8_8_8_SNORM", "value": 57},
- {"name": "IMG_FORMAT_8_8_8_8_USCALED", "value": 58},
- {"name": "IMG_FORMAT_8_8_8_8_SSCALED", "value": 59},
- {"name": "IMG_FORMAT_8_8_8_8_UINT", "value": 60},
- {"name": "IMG_FORMAT_8_8_8_8_SINT", "value": 61},
- {"name": "IMG_FORMAT_32_32_UINT", "value": 62},
- {"name": "IMG_FORMAT_32_32_SINT", "value": 63},
- {"name": "IMG_FORMAT_32_32_FLOAT", "value": 64},
- {"name": "IMG_FORMAT_16_16_16_16_UNORM", "value": 65},
- {"name": "IMG_FORMAT_16_16_16_16_SNORM", "value": 66},
- {"name": "IMG_FORMAT_16_16_16_16_USCALED", "value": 67},
- {"name": "IMG_FORMAT_16_16_16_16_SSCALED", "value": 68},
- {"name": "IMG_FORMAT_16_16_16_16_UINT", "value": 69},
- {"name": "IMG_FORMAT_16_16_16_16_SINT", "value": 70},
- {"name": "IMG_FORMAT_16_16_16_16_FLOAT", "value": 71},
- {"flags": ["buffers_only"], "name": "IMG_FORMAT_32_32_32_UINT", "value": 72},
- {"flags": ["buffers_only"], "name": "IMG_FORMAT_32_32_32_SINT", "value": 73},
- {"flags": ["buffers_only"], "name": "IMG_FORMAT_32_32_32_FLOAT", "value": 74},
- {"name": "IMG_FORMAT_32_32_32_32_UINT", "value": 75},
- {"name": "IMG_FORMAT_32_32_32_32_SINT", "value": 76},
- {"name": "IMG_FORMAT_32_32_32_32_FLOAT", "value": 77},
- {"name": "IMG_FORMAT_8_SRGB", "value": 128},
- {"name": "IMG_FORMAT_8_8_SRGB", "value": 129},
- {"name": "IMG_FORMAT_8_8_8_8_SRGB", "value": 130},
- {"name": "IMG_FORMAT_6E4_FLOAT", "value": 131},
- {"name": "IMG_FORMAT_5_9_9_9_FLOAT", "value": 132},
- {"name": "IMG_FORMAT_5_6_5_UNORM", "value": 133},
- {"name": "IMG_FORMAT_1_5_5_5_UNORM", "value": 134},
- {"name": "IMG_FORMAT_5_5_5_1_UNORM", "value": 135},
- {"name": "IMG_FORMAT_4_4_4_4_UNORM", "value": 136},
- {"name": "IMG_FORMAT_4_4_UNORM", "value": 137},
- {"name": "IMG_FORMAT_1_UNORM", "value": 138},
- {"name": "IMG_FORMAT_1_REVERSED_UNORM", "value": 139},
- {"name": "IMG_FORMAT_32_FLOAT_CLAMP", "value": 140},
- {"name": "IMG_FORMAT_8_24_UNORM", "value": 141},
- {"name": "IMG_FORMAT_8_24_UINT", "value": 142},
- {"name": "IMG_FORMAT_24_8_UNORM", "value": 143},
- {"name": "IMG_FORMAT_24_8_UINT", "value": 144},
- {"name": "IMG_FORMAT_X24_8_32_UINT", "value": 145},
- {"name": "IMG_FORMAT_X24_8_32_FLOAT", "value": 146},
- {"name": "IMG_FORMAT_GB_GR_UNORM", "value": 147},
- {"name": "IMG_FORMAT_GB_GR_SNORM", "value": 148},
- {"name": "IMG_FORMAT_GB_GR_UINT", "value": 149},
- {"name": "IMG_FORMAT_GB_GR_SRGB", "value": 150},
- {"name": "IMG_FORMAT_BG_RG_UNORM", "value": 151},
- {"name": "IMG_FORMAT_BG_RG_SNORM", "value": 152},
- {"name": "IMG_FORMAT_BG_RG_UINT", "value": 153},
- {"name": "IMG_FORMAT_BG_RG_SRGB", "value": 154},
- {"name": "IMG_FORMAT_FMASK8_S2_F1", "value": 156},
- {"name": "IMG_FORMAT_FMASK8_S4_F1", "value": 157},
- {"name": "IMG_FORMAT_FMASK8_S8_F1", "value": 158},
- {"name": "IMG_FORMAT_FMASK8_S2_F2", "value": 159},
- {"name": "IMG_FORMAT_FMASK8_S4_F2", "value": 160},
- {"name": "IMG_FORMAT_FMASK8_S4_F4", "value": 161},
- {"name": "IMG_FORMAT_FMASK16_S16_F1", "value": 162},
- {"name": "IMG_FORMAT_FMASK16_S8_F2", "value": 163},
- {"name": "IMG_FORMAT_FMASK32_S16_F2", "value": 164},
- {"name": "IMG_FORMAT_FMASK32_S8_F4", "value": 165},
- {"name": "IMG_FORMAT_FMASK32_S8_F8", "value": 166},
- {"name": "IMG_FORMAT_FMASK64_S16_F4", "value": 167},
- {"name": "IMG_FORMAT_FMASK64_S16_F8", "value": 168},
- {"name": "IMG_FORMAT_BC1_UNORM", "value": 169},
- {"name": "IMG_FORMAT_BC1_SRGB", "value": 170},
- {"name": "IMG_FORMAT_BC2_UNORM", "value": 171},
- {"name": "IMG_FORMAT_BC2_SRGB", "value": 172},
- {"name": "IMG_FORMAT_BC3_UNORM", "value": 173},
- {"name": "IMG_FORMAT_BC3_SRGB", "value": 174},
- {"name": "IMG_FORMAT_BC4_UNORM", "value": 175},
- {"name": "IMG_FORMAT_BC4_SNORM", "value": 176},
- {"name": "IMG_FORMAT_BC5_UNORM", "value": 177},
- {"name": "IMG_FORMAT_BC5_SNORM", "value": 178},
- {"name": "IMG_FORMAT_BC6_UFLOAT", "value": 179},
- {"name": "IMG_FORMAT_BC6_SFLOAT", "value": 180},
- {"name": "IMG_FORMAT_BC7_UNORM", "value": 181},
- {"name": "IMG_FORMAT_BC7_SRGB", "value": 182},
- {"name": "IMG_FORMAT_MM_8_UNORM", "value": 265},
- {"name": "IMG_FORMAT_MM_8_UINT", "value": 266},
- {"name": "IMG_FORMAT_MM_8_8_UNORM", "value": 267},
- {"name": "IMG_FORMAT_MM_8_8_UINT", "value": 268},
- {"name": "IMG_FORMAT_MM_8_8_8_8_UNORM", "value": 269},
- {"name": "IMG_FORMAT_MM_8_8_8_8_UINT", "value": 270},
- {"name": "IMG_FORMAT_MM_VYUY8_UNORM", "value": 271},
- {"name": "IMG_FORMAT_MM_VYUY8_UINT", "value": 272},
- {"name": "IMG_FORMAT_MM_10_11_11_UNORM", "value": 273},
- {"name": "IMG_FORMAT_MM_10_11_11_UINT", "value": 274},
- {"name": "IMG_FORMAT_MM_2_10_10_10_UNORM", "value": 275},
- {"name": "IMG_FORMAT_MM_2_10_10_10_UINT", "value": 276},
- {"name": "IMG_FORMAT_MM_16_16_16_16_UNORM", "value": 277},
- {"name": "IMG_FORMAT_MM_16_16_16_16_UINT", "value": 278},
- {"name": "IMG_FORMAT_MM_10_IN_16_UNORM", "value": 279},
- {"name": "IMG_FORMAT_MM_10_IN_16_UINT", "value": 280},
- {"name": "IMG_FORMAT_MM_10_IN_16_16_UNORM", "value": 281},
- {"name": "IMG_FORMAT_MM_10_IN_16_16_UINT", "value": 282},
- {"name": "IMG_FORMAT_MM_10_IN_16_16_16_16_UNORM ", "value": 283},
- {"name": "IMG_FORMAT_MM_10_IN_16_16_16_16_UINT", "value": 284},
- {"name": "IMG_FORMAT_7E3_FLOAT", "value": 285},
- {"name": "IMG_FORMAT_YCBCR_UNORM", "value": 286},
- {"name": "IMG_FORMAT_YCBCR_SNORM", "value": 287},
- {"name": "IMG_FORMAT_YCBCR_USCALED", "value": 288},
- {"name": "IMG_FORMAT_YCBCR_SSCALED", "value": 289},
- {"name": "IMG_FORMAT_YCBCR_UINT", "value": 290},
- {"name": "IMG_FORMAT_YCBCR_SINT", "value": 291},
- {"name": "IMG_FORMAT_YCBCR_SRGB", "value": 292}
+ {"name": "GFX10_FORMAT_INVALID", "value": 0},
+ {"name": "GFX10_FORMAT_8_UNORM", "value": 1},
+ {"name": "GFX10_FORMAT_8_SNORM", "value": 2},
+ {"name": "GFX10_FORMAT_8_USCALED", "value": 3},
+ {"name": "GFX10_FORMAT_8_SSCALED", "value": 4},
+ {"name": "GFX10_FORMAT_8_UINT", "value": 5},
+ {"name": "GFX10_FORMAT_8_SINT", "value": 6},
+ {"name": "GFX10_FORMAT_16_UNORM", "value": 7},
+ {"name": "GFX10_FORMAT_16_SNORM", "value": 8},
+ {"name": "GFX10_FORMAT_16_USCALED", "value": 9},
+ {"name": "GFX10_FORMAT_16_SSCALED", "value": 10},
+ {"name": "GFX10_FORMAT_16_UINT", "value": 11},
+ {"name": "GFX10_FORMAT_16_SINT", "value": 12},
+ {"name": "GFX10_FORMAT_16_FLOAT", "value": 13},
+ {"name": "GFX10_FORMAT_8_8_UNORM", "value": 14},
+ {"name": "GFX10_FORMAT_8_8_SNORM", "value": 15},
+ {"name": "GFX10_FORMAT_8_8_USCALED", "value": 16},
+ {"name": "GFX10_FORMAT_8_8_SSCALED", "value": 17},
+ {"name": "GFX10_FORMAT_8_8_UINT", "value": 18},
+ {"name": "GFX10_FORMAT_8_8_SINT", "value": 19},
+ {"name": "GFX10_FORMAT_32_UINT", "value": 20},
+ {"name": "GFX10_FORMAT_32_SINT", "value": 21},
+ {"name": "GFX10_FORMAT_32_FLOAT", "value": 22},
+ {"name": "GFX10_FORMAT_16_16_UNORM", "value": 23},
+ {"name": "GFX10_FORMAT_16_16_SNORM", "value": 24},
+ {"name": "GFX10_FORMAT_16_16_USCALED", "value": 25},
+ {"name": "GFX10_FORMAT_16_16_SSCALED", "value": 26},
+ {"name": "GFX10_FORMAT_16_16_UINT", "value": 27},
+ {"name": "GFX10_FORMAT_16_16_SINT", "value": 28},
+ {"name": "GFX10_FORMAT_16_16_FLOAT", "value": 29},
+ {"name": "GFX10_FORMAT_10_11_11_UNORM", "value": 30},
+ {"name": "GFX10_FORMAT_10_11_11_SNORM", "value": 31},
+ {"name": "GFX10_FORMAT_10_11_11_USCALED", "value": 32},
+ {"name": "GFX10_FORMAT_10_11_11_SSCALED", "value": 33},
+ {"name": "GFX10_FORMAT_10_11_11_UINT", "value": 34},
+ {"name": "GFX10_FORMAT_10_11_11_SINT", "value": 35},
+ {"name": "GFX10_FORMAT_10_11_11_FLOAT", "value": 36},
+ {"name": "GFX10_FORMAT_11_11_10_UNORM", "value": 37},
+ {"name": "GFX10_FORMAT_11_11_10_SNORM", "value": 38},
+ {"name": "GFX10_FORMAT_11_11_10_USCALED", "value": 39},
+ {"name": "GFX10_FORMAT_11_11_10_SSCALED", "value": 40},
+ {"name": "GFX10_FORMAT_11_11_10_UINT", "value": 41},
+ {"name": "GFX10_FORMAT_11_11_10_SINT", "value": 42},
+ {"name": "GFX10_FORMAT_11_11_10_FLOAT", "value": 43},
+ {"name": "GFX10_FORMAT_10_10_10_2_UNORM", "value": 44},
+ {"name": "GFX10_FORMAT_10_10_10_2_SNORM", "value": 45},
+ {"name": "GFX10_FORMAT_10_10_10_2_USCALED", "value": 46},
+ {"name": "GFX10_FORMAT_10_10_10_2_SSCALED", "value": 47},
+ {"name": "GFX10_FORMAT_10_10_10_2_UINT", "value": 48},
+ {"name": "GFX10_FORMAT_10_10_10_2_SINT", "value": 49},
+ {"name": "GFX10_FORMAT_2_10_10_10_UNORM", "value": 50},
+ {"name": "GFX10_FORMAT_2_10_10_10_SNORM", "value": 51},
+ {"name": "GFX10_FORMAT_2_10_10_10_USCALED", "value": 52},
+ {"name": "GFX10_FORMAT_2_10_10_10_SSCALED", "value": 53},
+ {"name": "GFX10_FORMAT_2_10_10_10_UINT", "value": 54},
+ {"name": "GFX10_FORMAT_2_10_10_10_SINT", "value": 55},
+ {"name": "GFX10_FORMAT_8_8_8_8_UNORM", "value": 56},
+ {"name": "GFX10_FORMAT_8_8_8_8_SNORM", "value": 57},
+ {"name": "GFX10_FORMAT_8_8_8_8_USCALED", "value": 58},
+ {"name": "GFX10_FORMAT_8_8_8_8_SSCALED", "value": 59},
+ {"name": "GFX10_FORMAT_8_8_8_8_UINT", "value": 60},
+ {"name": "GFX10_FORMAT_8_8_8_8_SINT", "value": 61},
+ {"name": "GFX10_FORMAT_32_32_UINT", "value": 62},
+ {"name": "GFX10_FORMAT_32_32_SINT", "value": 63},
+ {"name": "GFX10_FORMAT_32_32_FLOAT", "value": 64},
+ {"name": "GFX10_FORMAT_16_16_16_16_UNORM", "value": 65},
+ {"name": "GFX10_FORMAT_16_16_16_16_SNORM", "value": 66},
+ {"name": "GFX10_FORMAT_16_16_16_16_USCALED", "value": 67},
+ {"name": "GFX10_FORMAT_16_16_16_16_SSCALED", "value": 68},
+ {"name": "GFX10_FORMAT_16_16_16_16_UINT", "value": 69},
+ {"name": "GFX10_FORMAT_16_16_16_16_SINT", "value": 70},
+ {"name": "GFX10_FORMAT_16_16_16_16_FLOAT", "value": 71},
+ {"flags": ["buffers_only"], "name": "GFX10_FORMAT_32_32_32_UINT", "value": 72},
+ {"flags": ["buffers_only"], "name": "GFX10_FORMAT_32_32_32_SINT", "value": 73},
+ {"flags": ["buffers_only"], "name": "GFX10_FORMAT_32_32_32_FLOAT", "value": 74},
+ {"name": "GFX10_FORMAT_32_32_32_32_UINT", "value": 75},
+ {"name": "GFX10_FORMAT_32_32_32_32_SINT", "value": 76},
+ {"name": "GFX10_FORMAT_32_32_32_32_FLOAT", "value": 77},
+ {"name": "GFX10_FORMAT_8_SRGB", "value": 128},
+ {"name": "GFX10_FORMAT_8_8_SRGB", "value": 129},
+ {"name": "GFX10_FORMAT_8_8_8_8_SRGB", "value": 130},
+ {"name": "GFX10_FORMAT_6E4_FLOAT", "value": 131},
+ {"name": "GFX10_FORMAT_5_9_9_9_FLOAT", "value": 132},
+ {"name": "GFX10_FORMAT_5_6_5_UNORM", "value": 133},
+ {"name": "GFX10_FORMAT_1_5_5_5_UNORM", "value": 134},
+ {"name": "GFX10_FORMAT_5_5_5_1_UNORM", "value": 135},
+ {"name": "GFX10_FORMAT_4_4_4_4_UNORM", "value": 136},
+ {"name": "GFX10_FORMAT_4_4_UNORM", "value": 137},
+ {"name": "GFX10_FORMAT_1_UNORM", "value": 138},
+ {"name": "GFX10_FORMAT_1_REVERSED_UNORM", "value": 139},
+ {"name": "GFX10_FORMAT_32_FLOAT_CLAMP", "value": 140},
+ {"name": "GFX10_FORMAT_8_24_UNORM", "value": 141},
+ {"name": "GFX10_FORMAT_8_24_UINT", "value": 142},
+ {"name": "GFX10_FORMAT_24_8_UNORM", "value": 143},
+ {"name": "GFX10_FORMAT_24_8_UINT", "value": 144},
+ {"name": "GFX10_FORMAT_X24_8_32_UINT", "value": 145},
+ {"name": "GFX10_FORMAT_X24_8_32_FLOAT", "value": 146},
+ {"name": "GFX10_FORMAT_GB_GR_UNORM", "value": 147},
+ {"name": "GFX10_FORMAT_GB_GR_SNORM", "value": 148},
+ {"name": "GFX10_FORMAT_GB_GR_UINT", "value": 149},
+ {"name": "GFX10_FORMAT_GB_GR_SRGB", "value": 150},
+ {"name": "GFX10_FORMAT_BG_RG_UNORM", "value": 151},
+ {"name": "GFX10_FORMAT_BG_RG_SNORM", "value": 152},
+ {"name": "GFX10_FORMAT_BG_RG_UINT", "value": 153},
+ {"name": "GFX10_FORMAT_BG_RG_SRGB", "value": 154},
+ {"name": "GFX10_FORMAT_FMASK8_S2_F1", "value": 156},
+ {"name": "GFX10_FORMAT_FMASK8_S4_F1", "value": 157},
+ {"name": "GFX10_FORMAT_FMASK8_S8_F1", "value": 158},
+ {"name": "GFX10_FORMAT_FMASK8_S2_F2", "value": 159},
+ {"name": "GFX10_FORMAT_FMASK8_S4_F2", "value": 160},
+ {"name": "GFX10_FORMAT_FMASK8_S4_F4", "value": 161},
+ {"name": "GFX10_FORMAT_FMASK16_S16_F1", "value": 162},
+ {"name": "GFX10_FORMAT_FMASK16_S8_F2", "value": 163},
+ {"name": "GFX10_FORMAT_FMASK32_S16_F2", "value": 164},
+ {"name": "GFX10_FORMAT_FMASK32_S8_F4", "value": 165},
+ {"name": "GFX10_FORMAT_FMASK32_S8_F8", "value": 166},
+ {"name": "GFX10_FORMAT_FMASK64_S16_F4", "value": 167},
+ {"name": "GFX10_FORMAT_FMASK64_S16_F8", "value": 168},
+ {"name": "GFX10_FORMAT_BC1_UNORM", "value": 169},
+ {"name": "GFX10_FORMAT_BC1_SRGB", "value": 170},
+ {"name": "GFX10_FORMAT_BC2_UNORM", "value": 171},
+ {"name": "GFX10_FORMAT_BC2_SRGB", "value": 172},
+ {"name": "GFX10_FORMAT_BC3_UNORM", "value": 173},
+ {"name": "GFX10_FORMAT_BC3_SRGB", "value": 174},
+ {"name": "GFX10_FORMAT_BC4_UNORM", "value": 175},
+ {"name": "GFX10_FORMAT_BC4_SNORM", "value": 176},
+ {"name": "GFX10_FORMAT_BC5_UNORM", "value": 177},
+ {"name": "GFX10_FORMAT_BC5_SNORM", "value": 178},
+ {"name": "GFX10_FORMAT_BC6_UFLOAT", "value": 179},
+ {"name": "GFX10_FORMAT_BC6_SFLOAT", "value": 180},
+ {"name": "GFX10_FORMAT_BC7_UNORM", "value": 181},
+ {"name": "GFX10_FORMAT_BC7_SRGB", "value": 182},
+ {"name": "GFX10_FORMAT_MM_8_UNORM", "value": 265},
+ {"name": "GFX10_FORMAT_MM_8_UINT", "value": 266},
+ {"name": "GFX10_FORMAT_MM_8_8_UNORM", "value": 267},
+ {"name": "GFX10_FORMAT_MM_8_8_UINT", "value": 268},
+ {"name": "GFX10_FORMAT_MM_8_8_8_8_UNORM", "value": 269},
+ {"name": "GFX10_FORMAT_MM_8_8_8_8_UINT", "value": 270},
+ {"name": "GFX10_FORMAT_MM_VYUY8_UNORM", "value": 271},
+ {"name": "GFX10_FORMAT_MM_VYUY8_UINT", "value": 272},
+ {"name": "GFX10_FORMAT_MM_10_11_11_UNORM", "value": 273},
+ {"name": "GFX10_FORMAT_MM_10_11_11_UINT", "value": 274},
+ {"name": "GFX10_FORMAT_MM_2_10_10_10_UNORM", "value": 275},
+ {"name": "GFX10_FORMAT_MM_2_10_10_10_UINT", "value": 276},
+ {"name": "GFX10_FORMAT_MM_16_16_16_16_UNORM", "value": 277},
+ {"name": "GFX10_FORMAT_MM_16_16_16_16_UINT", "value": 278},
+ {"name": "GFX10_FORMAT_MM_10_IN_16_UNORM", "value": 279},
+ {"name": "GFX10_FORMAT_MM_10_IN_16_UINT", "value": 280},
+ {"name": "GFX10_FORMAT_MM_10_IN_16_16_UNORM", "value": 281},
+ {"name": "GFX10_FORMAT_MM_10_IN_16_16_UINT", "value": 282},
+ {"name": "GFX10_FORMAT_MM_10_IN_16_16_16_16_UNORM ", "value": 283},
+ {"name": "GFX10_FORMAT_MM_10_IN_16_16_16_16_UINT", "value": 284},
+ {"name": "GFX10_FORMAT_7E3_FLOAT", "value": 285},
+ {"name": "GFX10_FORMAT_YCBCR_UNORM", "value": 286},
+ {"name": "GFX10_FORMAT_YCBCR_SNORM", "value": 287},
+ {"name": "GFX10_FORMAT_YCBCR_USCALED", "value": 288},
+ {"name": "GFX10_FORMAT_YCBCR_SSCALED", "value": 289},
+ {"name": "GFX10_FORMAT_YCBCR_UINT", "value": 290},
+ {"name": "GFX10_FORMAT_YCBCR_SINT", "value": 291},
+ {"name": "GFX10_FORMAT_YCBCR_SRGB", "value": 292}
]
},
"SQ_EXP_0__TGT": {
@@ -332,7 +332,7 @@
{"bits": [3, 5], "name": "DST_SEL_Y"},
{"bits": [6, 8], "name": "DST_SEL_Z"},
{"bits": [9, 11], "name": "DST_SEL_W"},
- {"bits": [12, 18], "enum_ref": "IMG_FORMAT", "name": "FORMAT"},
+ {"bits": [12, 18], "enum_ref": "GFX10_FORMAT", "name": "FORMAT"},
{"bits": [21, 22], "name": "INDEX_STRIDE"},
{"bits": [23, 23], "name": "ADD_TID_ENABLE"},
{"bits": [24, 24], "comment": "must be 1", "name": "RESOURCE_LEVEL"},
@@ -346,7 +346,7 @@
{"bits": [3, 5], "name": "DST_SEL_Y"},
{"bits": [6, 8], "name": "DST_SEL_Z"},
{"bits": [9, 11], "name": "DST_SEL_W"},
- {"bits": [12, 18], "enum_ref": "IMG_FORMAT", "name": "FORMAT"},
+ {"bits": [12, 18], "enum_ref": "GFX10_FORMAT", "name": "FORMAT"},
{"bits": [21, 22], "name": "INDEX_STRIDE"},
{"bits": [23, 23], "name": "ADD_TID_ENABLE"},
{"bits": [24, 24], "comment": "must be 1", "name": "RESOURCE_LEVEL"},
@@ -368,7 +368,7 @@
"fields": [
{"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
{"bits": [8, 19], "name": "MIN_LOD"},
- {"bits": [20, 28], "enum_ref": "IMG_FORMAT", "name": "FORMAT"},
+ {"bits": [20, 28], "enum_ref": "GFX10_FORMAT", "name": "FORMAT"},
{"bits": [30, 31], "name": "WIDTH_LO"}
]
},
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5e98bd2bc36..67a5aef0d8a 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2817,7 +2817,7 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer, bool pipeline_
*/
int oob_select = stride ? V_008F0C_OOB_SELECT_STRUCTURED : V_008F0C_OOB_SELECT_RAW;
- rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_UINT) |
+ rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_UINT) |
S_008F0C_OOB_SELECT(oob_select) | S_008F0C_RESOURCE_LEVEL(1);
} else {
rsrc_word3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_UINT) |
@@ -2923,7 +2923,7 @@ radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer)
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) {
- rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
rsrc_word3 |= S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
@@ -4006,7 +4006,7 @@ radv_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pi
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) {
- dst[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ dst[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
dst[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_descriptor_set.c
index d51492ce01b..8f4c70aa5be 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -980,7 +980,7 @@ write_buffer_descriptor(struct radv_device *device, struct radv_cmd_buffer *cmd_
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (device->physical_device->rad_info.chip_class >= GFX10) {
- rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
rsrc_word3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 44ffeba07d3..495900f1f59 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3256,7 +3256,7 @@ fill_geom_tess_rings(struct radv_queue *queue, uint32_t *map, bool add_sample_po
S_008F0C_INDEX_STRIDE(3) | S_008F0C_ADD_TID_ENABLE(1);
if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
- desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3273,7 +3273,7 @@ fill_geom_tess_rings(struct radv_queue *queue, uint32_t *map, bool add_sample_po
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
- desc[7] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3296,7 +3296,7 @@ fill_geom_tess_rings(struct radv_queue *queue, uint32_t *map, bool add_sample_po
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
- desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3314,7 +3314,7 @@ fill_geom_tess_rings(struct radv_queue *queue, uint32_t *map, bool add_sample_po
S_008F0C_INDEX_STRIDE(1) | S_008F0C_ADD_TID_ENABLE(true);
if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
- desc[7] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3335,7 +3335,7 @@ fill_geom_tess_rings(struct radv_queue *queue, uint32_t *map, bool add_sample_po
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
- desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -3349,7 +3349,7 @@ fill_geom_tess_rings(struct radv_queue *queue, uint32_t *map, bool add_sample_po
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
- desc[7] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 51259b0cc0a..3a625f496c4 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -939,13 +939,13 @@ gfx10_make_texture_descriptor(struct radv_device *device, struct radv_image *ima
switch (image->info.samples) {
case 2:
- format = V_008F0C_IMG_FORMAT_FMASK8_S2_F2;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S2_F2;
break;
case 4:
- format = V_008F0C_IMG_FORMAT_FMASK8_S4_F4;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S4_F4;
break;
case 8:
- format = V_008F0C_IMG_FORMAT_FMASK32_S8_F8;
+ format = V_008F0C_GFX10_FORMAT_FMASK32_S8_F8;
break;
default:
unreachable("invalid nr_samples");
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 5ff513ccf2f..51dfd318b95 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -458,7 +458,7 @@ radv_load_ubo(struct ac_shader_abi *abi, unsigned desc_set, unsigned binding, bo
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (ctx->ac.chip_class >= GFX10) {
- desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc_type |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc_type |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
index 3d17f08ca51..04825f27ac5 100644
--- a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
+++ b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
@@ -1157,7 +1157,7 @@ void si_dispatch_prim_discard_cs_and_draw(struct si_context *sctx,
case PIPE_PRIM_TRIANGLE_FAN:
vertices_per_prim = 3;
output_indexbuf_format = V_008F0C_BUF_DATA_FORMAT_32_32_32;
- gfx10_output_indexbuf_format = V_008F0C_IMG_FORMAT_32_32_32_UINT;
+ gfx10_output_indexbuf_format = V_008F0C_GFX10_FORMAT_32_32_32_UINT;
break;
default:
unreachable("unsupported primitive type");
@@ -1278,9 +1278,9 @@ void si_dispatch_prim_discard_cs_and_draw(struct si_context *sctx,
if (sctx->chip_class >= GFX10) {
desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
- S_008F0C_FORMAT(index_size == 1 ? V_008F0C_IMG_FORMAT_8_UINT
- : index_size == 2 ? V_008F0C_IMG_FORMAT_16_UINT
- : V_008F0C_IMG_FORMAT_32_UINT) |
+ S_008F0C_FORMAT(index_size == 1 ? V_008F0C_GFX10_FORMAT_8_UINT
+ : index_size == 2 ? V_008F0C_GFX10_FORMAT_16_UINT
+ : V_008F0C_GFX10_FORMAT_32_UINT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_STRUCTURED_WITH_OFFSET) |
S_008F0C_RESOURCE_LEVEL(1);
} else {
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index c3a81daa434..4d5a5a1456a 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1159,7 +1159,7 @@ static void si_set_constant_buffer(struct si_context *sctx, struct si_buffer_res
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (sctx->chip_class >= GFX10) {
- desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -1260,7 +1260,7 @@ static void si_set_shader_buffer(struct si_context *sctx, struct si_buffer_resou
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (sctx->chip_class >= GFX10) {
- desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
@@ -1412,7 +1412,7 @@ void si_set_ring_buffer(struct si_context *sctx, uint slot, struct pipe_resource
desc[3] |= S_008F0C_ELEMENT_SIZE(element_size);
if (sctx->chip_class >= GFX10) {
- desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) | S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c b/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c
index bee22d48589..67d7150d694 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c
@@ -403,7 +403,7 @@ void si_preload_gs_rings(struct si_shader_context *ctx)
S_008F0C_ADD_TID_ENABLE(1);
if (ctx->ac.chip_class >= GFX10) {
- rsrc3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ rsrc3 |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_DISABLED) | S_008F0C_RESOURCE_LEVEL(1);
} else {
rsrc3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_resources.c b/src/gallium/drivers/radeonsi/si_shader_llvm_resources.c
index 95b389c4030..af4f389546d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_resources.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_resources.c
@@ -73,7 +73,7 @@ static LLVMValueRef load_const_buffer_desc_fast_path(struct si_shader_context *c
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (ctx->screen->info.chip_class >= GFX10)
- rsrc3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ rsrc3 |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
else
rsrc3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
index e1a5a2138b9..145df00efb3 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
@@ -358,7 +358,7 @@ static LLVMValueRef get_tess_ring_descriptor(struct si_shader_context *ctx, enum
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
if (ctx->screen->info.chip_class >= GFX10)
- rsrc3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+ rsrc3 |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) | S_008F0C_RESOURCE_LEVEL(1);
else
rsrc3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 54f87302380..8f22a188e56 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3751,8 +3751,8 @@ static void gfx10_make_texture_descriptor(
}
if (tex->upgraded_depth && !is_stencil) {
- assert(img_format == V_008F0C_IMG_FORMAT_32_FLOAT);
- img_format = V_008F0C_IMG_FORMAT_32_FLOAT_CLAMP;
+ assert(img_format == V_008F0C_GFX10_FORMAT_32_FLOAT);
+ img_format = V_008F0C_GFX10_FORMAT_32_FLOAT_CLAMP;
}
} else {
util_format_compose_swizzles(desc->swizzle, state_swizzle, swizzle);
@@ -3816,43 +3816,43 @@ static void gfx10_make_texture_descriptor(
#define FMASK(s, f) (((unsigned)(MAX2(1, s)) * 16) + (MAX2(1, f)))
switch (FMASK(res->nr_samples, res->nr_storage_samples)) {
case FMASK(2, 1):
- format = V_008F0C_IMG_FORMAT_FMASK8_S2_F1;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S2_F1;
break;
case FMASK(2, 2):
- format = V_008F0C_IMG_FORMAT_FMASK8_S2_F2;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S2_F2;
break;
case FMASK(4, 1):
- format = V_008F0C_IMG_FORMAT_FMASK8_S4_F1;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S4_F1;
break;
case FMASK(4, 2):
- format = V_008F0C_IMG_FORMAT_FMASK8_S4_F2;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S4_F2;
break;
case FMASK(4, 4):
- format = V_008F0C_IMG_FORMAT_FMASK8_S4_F4;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S4_F4;
break;
case FMASK(8, 1):
- format = V_008F0C_IMG_FORMAT_FMASK8_S8_F1;
+ format = V_008F0C_GFX10_FORMAT_FMASK8_S8_F1;
break;
case FMASK(8, 2):
- format = V_008F0C_IMG_FORMAT_FMASK16_S8_F2;
+ format = V_008F0C_GFX10_FORMAT_FMASK16_S8_F2;
break;
case FMASK(8, 4):
- format = V_008F0C_IMG_FORMAT_FMASK32_S8_F4;
+ format = V_008F0C_GFX10_FORMAT_FMASK32_S8_F4;
break;
case FMASK(8, 8):
- format = V_008F0C_IMG_FORMAT_FMASK32_S8_F8;
+ format = V_008F0C_GFX10_FORMAT_FMASK32_S8_F8;
break;
case FMASK(16, 1):
- format = V_008F0C_IMG_FORMAT_FMASK16_S16_F1;
+ format = V_008F0C_GFX10_FORMAT_FMASK16_S16_F1;
break;
case FMASK(16, 2):
- format = V_008F0C_IMG_FORMAT_FMASK32_S16_F2;
+ format = V_008F0C_GFX10_FORMAT_FMASK32_S16_F2;
break;
case FMASK(16, 4):
- format = V_008F0C_IMG_FORMAT_FMASK64_S16_F4;
+ format = V_008F0C_GFX10_FORMAT_FMASK64_S16_F4;
break;
case FMASK(16, 8):
- format = V_008F0C_IMG_FORMAT_FMASK64_S16_F8;
+ format = V_008F0C_GFX10_FORMAT_FMASK64_S16_F8;
break;
default:
unreachable("invalid nr_samples");
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