Mesa (staging/21.0): aco: Mark VCC clobbered for iadd8 and iadd16 reductions on GFX6-7.
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Thu Apr 22 20:16:10 UTC 2021
Module: Mesa
Branch: staging/21.0
Commit: d32e751681e8aa8849e7a00561f91e0bd7167243
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d32e751681e8aa8849e7a00561f91e0bd7167243
Author: Timur Kristóf <timur.kristof at gmail.com>
Date: Tue Apr 20 13:55:23 2021 +0200
aco: Mark VCC clobbered for iadd8 and iadd16 reductions on GFX6-7.
On GFX6-7, the 8 and 16-bit integer add reductions use the 32-bit v_add
instruction, which clobbers the VCC register.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10346>
(cherry picked from commit 74c467d9886cbb588d9e8f0ac23775d4b9d780bd)
---
.pick_status.json | 2 +-
src/amd/compiler/aco_instruction_selection.cpp | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/.pick_status.json b/.pick_status.json
index 31a85afeef1..78bdf90cf2d 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -148,7 +148,7 @@
"description": "aco: Mark VCC clobbered for iadd8 and iadd16 reductions on GFX6-7.",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": null
},
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 04f5a41c5d6..acb65c8c1c2 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -7828,6 +7828,8 @@ Temp emit_reduction_instr(isel_context *ctx, aco_opcode aco_op, ReduceOp op,
bool clobber_vcc = false;
if ((op == iadd32 || op == imul64) && ctx->program->chip_class < GFX9)
clobber_vcc = true;
+ if ((op == iadd8 || op == iadd16) && ctx->program->chip_class < GFX8)
+ clobber_vcc = true;
if (op == iadd64 || op == umin64 || op == umax64 || op == imin64 || op == imax64)
clobber_vcc = true;
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