Mesa (staging/21.1): pan/bi: Skip nir_opt_move/sink for blend shaders

[GitLab Mirror]

Module: Mesa
Branch: staging/21.1
Commit: a24924bb60e27bbb0d8057a6eccd8f4e0a911de7
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a24924bb60e27bbb0d8057a6eccd8f4e0a911de7

Author: Icecream95 <ixn at disroot.org>
Date:   Wed Apr  7 23:43:05 2021 +1200

pan/bi: Skip nir_opt_move/sink for blend shaders

Otherwise the dual-source input load is moved further down in the
shader, so the registers can get clobbered before then.

Fixes text not being visible in Alacritty.

Fixes: 52863f2e60f ("pan/bi: Enable all nir_opt_move/sink optimizations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10089>
(cherry picked from commit ab3a72cc2057beb90acb5346c48baa29d6d2fa52)

---

 .pick_status.json                      |  2 +-
 src/panfrost/bifrost/bifrost_compile.c | 13 ++++++++-----
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index e2687284b11..f014ec29875 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -463,7 +463,7 @@
         "description": "pan/bi: Skip nir_opt_move/sink for blend shaders",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "52863f2e60fae865ef6a2a2e5a385b252c73364c"
     },
diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index e045081910a..e7bb90fc58f 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -2814,7 +2814,7 @@ should_split_wrmask(const nir_instr *instr, UNUSED const void *data)
 }
 
 static void
-bi_optimize_nir(nir_shader *nir)
+bi_optimize_nir(nir_shader *nir, bool is_blend)
 {
         bool progress;
         unsigned lower_flrp = 16 | 32 | 64;
@@ -2908,13 +2908,16 @@ bi_optimize_nir(nir_shader *nir)
         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 
         /* Backend scheduler is purely local, so do some global optimizations
-         * to reduce register pressure */
+         * to reduce register pressure.  Skip the passes for blend shaders to
+         * workaround the lack of precolouring. */
         nir_move_options move_all =
                 nir_move_const_undef | nir_move_load_ubo | nir_move_load_input |
                 nir_move_comparisons | nir_move_copies | nir_move_load_ssbo;
 
-        NIR_PASS_V(nir, nir_opt_sink, move_all);
-        NIR_PASS_V(nir, nir_opt_move, move_all);
+        if (!is_blend) {
+                NIR_PASS_V(nir, nir_opt_sink, move_all);
+                NIR_PASS_V(nir, nir_opt_move, move_all);
+        }
 
         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 
@@ -3046,7 +3049,7 @@ bifrost_compile_shader_nir(nir_shader *nir,
         // TODO: re-enable when fp16 is flipped on
         // NIR_PASS_V(nir, nir_lower_mediump_outputs);
 
-        bi_optimize_nir(nir);
+        bi_optimize_nir(nir, ctx->inputs->is_blend);
 
         NIR_PASS_V(nir, pan_nir_reorder_writeout);