Mesa (staging/21.1): radv: fix emitting default depth bounds state on GFX6

[GitLab Mirror]

Module: Mesa
Branch: staging/21.1
Commit: 30d908e06967d110cfbc59bc14ef59d16d8b37b1
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=30d908e06967d110cfbc59bc14ef59d16d8b37b1

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Apr 20 13:09:09 2021 +0200

radv: fix emitting default depth bounds state on GFX6

GFX6 has no CLEAR_STATE.

One step towards Vulkan conformance on these old chips.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10347>
(cherry picked from commit a12b844d40187c582c47dddfeecf91d4dd1643df)

---

 .pick_status.json                           | 2 +-
 src/amd/ci/deqp-radv-oland-aco-fails.txt    | 2 --
 src/amd/ci/deqp-radv-pitcairn-aco-fails.txt | 2 --
 src/amd/vulkan/radv_cmd_buffer.c            | 3 ++-
 4 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index cf56e3e14e1..201b7f29a76 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -373,7 +373,7 @@
         "description": "radv: fix emitting default depth bounds state on GFX6",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/ci/deqp-radv-oland-aco-fails.txt b/src/amd/ci/deqp-radv-oland-aco-fails.txt
index f205e2408f0..322f0e907af 100644
--- a/src/amd/ci/deqp-radv-oland-aco-fails.txt
+++ b/src/amd/ci/deqp-radv-oland-aco-fails.txt
@@ -1,5 +1,3 @@
-dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled,Fail
-dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled,Fail
 dEQP-VK.robustness.robustness2.bind.notemplate.r32f.dontunroll.volatile.storage_buffer.no_fmt_qual.len_12.samples_1.1d.comp,Fail
 dEQP-VK.robustness.robustness2.bind.notemplate.r32f.dontunroll.volatile.storage_buffer.no_fmt_qual.len_12.samples_1.1d.frag,Fail
 dEQP-VK.robustness.robustness2.bind.notemplate.r32f.dontunroll.volatile.storage_buffer.no_fmt_qual.len_12.samples_1.1d.vert,Fail
diff --git a/src/amd/ci/deqp-radv-pitcairn-aco-fails.txt b/src/amd/ci/deqp-radv-pitcairn-aco-fails.txt
index 8a40ac3ed3b..3cbc83d8cdc 100644
--- a/src/amd/ci/deqp-radv-pitcairn-aco-fails.txt
+++ b/src/amd/ci/deqp-radv-pitcairn-aco-fails.txt
@@ -1,5 +1,3 @@
-dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled,Fail
-dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled,Fail
 dEQP-VK.robustness.robustness2.bind.notemplate.r32f.dontunroll.volatile.storage_buffer.no_fmt_qual.len_12.samples_1.1d.comp,Fail
 dEQP-VK.robustness.robustness2.bind.notemplate.r32f.dontunroll.volatile.storage_buffer.no_fmt_qual.len_12.samples_1.1d.frag,Fail
 dEQP-VK.robustness.robustness2.bind.notemplate.r32f.dontunroll.volatile.storage_buffer.no_fmt_qual.len_12.samples_1.1d.vert,Fail
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 059216002ee..e6ca179b7ab 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1263,7 +1263,8 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer)
 
    if (!cmd_buffer->state.emitted_pipeline)
       cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY |
-                                 RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
+                                 RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS |
+                                 RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
 
    if (!cmd_buffer->state.emitted_pipeline ||
        cmd_buffer->state.emitted_pipeline->graphics.db_depth_control !=