Mesa (master): radv: add the provoking vertex mode to the pipeline/shader keys
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Tue Apr 27 07:40:05 UTC 2021
Module: Mesa
Branch: master
Commit: d21ffa9c7db87934b876bd0f8cca0a1b9999d48f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d21ffa9c7db87934b876bd0f8cca0a1b9999d48f
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Apr 21 08:57:26 2021 +0200
radv: add the provoking vertex mode to the pipeline/shader keys
It might change the NGG code on GFX10+.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Tested-By: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10449>
---
src/amd/vulkan/radv_pipeline.c | 12 +++++++++++-
src/amd/vulkan/radv_private.h | 1 +
src/amd/vulkan/radv_shader.h | 3 +++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 7e47ada5e38..efd1387b27c 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2605,9 +2605,18 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline,
key.is_int10 = blend->col_format_is_int10;
}
- if (pipeline->device->physical_device->rad_info.chip_class >= GFX10)
+ if (pipeline->device->physical_device->rad_info.chip_class >= GFX10) {
key.topology = pCreateInfo->pInputAssemblyState->topology;
+ const VkPipelineRasterizationStateCreateInfo *raster_info = pCreateInfo->pRasterizationState;
+ const VkPipelineRasterizationProvokingVertexStateCreateInfoEXT *provoking_vtx_info =
+ vk_find_struct_const(raster_info->pNext,
+ PIPELINE_RASTERIZATION_PROVOKING_VERTEX_STATE_CREATE_INFO_EXT);
+ if (provoking_vtx_info &&
+ provoking_vtx_info->provokingVertexMode == VK_PROVOKING_VERTEX_MODE_LAST_VERTEX_EXT) {
+ key.provoking_vtx_last = true;
+ }
+ }
return key;
}
@@ -2636,6 +2645,7 @@ radv_fill_shader_keys(struct radv_device *device, struct radv_shader_variant_key
keys[MESA_SHADER_VERTEX].vs.alpha_adjust[i] = key->vertex_alpha_adjust[i];
}
keys[MESA_SHADER_VERTEX].vs.outprim = si_conv_prim_to_gs_out(key->topology);
+ keys[MESA_SHADER_VERTEX].vs.provoking_vtx_last = key->provoking_vtx_last;
if (nir[MESA_SHADER_TESS_CTRL]) {
keys[MESA_SHADER_VERTEX].vs_common_out.as_ls = true;
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 76550df59ea..7134c454299 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -366,6 +366,7 @@ struct radv_pipeline_key {
uint8_t num_samples;
uint32_t has_multiview_view_index : 1;
uint32_t optimisations_disabled : 1;
+ uint32_t provoking_vtx_last : 1;
uint8_t topology;
/* Non-zero if a required subgroup size is specified via
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 7bfcf854dbe..e78b97262de 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -76,6 +76,9 @@ struct radv_vs_variant_key {
/* Output primitive type. */
uint8_t outprim;
+
+ /* Provoking vertex mode. */
+ bool provoking_vtx_last;
};
struct radv_tes_variant_key {
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