Mesa (staging/21.0): amd/common: Add missing line from backport for coherency.

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Module: Mesa
Branch: staging/21.0
Commit: 25fc9a4560221ccd4f6fb6e790650968531dea11
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=25fc9a4560221ccd4f6fb6e790650968531dea11

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Sat Apr 24 16:23:43 2021 +0200

amd/common: Add missing line from backport for coherency.

The line initializing the variable was missed.

Fixes: ccc4abdbf4b ("ac/gpu_info: fix more non-coherent RB and GL2 combinations")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4691
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10440>

---

 src/amd/common/ac_gpu_info.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 47e6b8c332f..44728827197 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -710,6 +710,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
       info->num_tcc_blocks = info->max_tcc_blocks;
    }
 
+   info->tcc_rb_non_coherent = !util_is_power_of_two_or_zero(info->num_tcc_blocks);
+
    info->mc_arb_ramcfg = amdinfo->mc_arb_ramcfg;
    info->gb_addr_config = amdinfo->gb_addr_cfg;
    if (info->chip_class >= GFX9) {