Mesa (main): amd/addrlib: expose CMASK address equations to drivers on GFX10+

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Module: Mesa
Branch: main
Commit: 0926b268fc9a73d0eb48a47a8604acde8ca811ef
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0926b268fc9a73d0eb48a47a8604acde8ca811ef

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Aug  3 13:26:33 2021 +0200

amd/addrlib: expose CMASK address equations to drivers on GFX10+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12182>

---

 src/amd/addrlib/inc/addrinterface.h        |  3 +++
 src/amd/addrlib/src/gfx10/gfx10addrlib.cpp | 11 +++++++++++
 2 files changed, 14 insertions(+)

diff --git a/src/amd/addrlib/inc/addrinterface.h b/src/amd/addrlib/inc/addrinterface.h
index 3601a530f69..1b03548b968 100644
--- a/src/amd/addrlib/inc/addrinterface.h
+++ b/src/amd/addrlib/inc/addrinterface.h
@@ -3005,6 +3005,9 @@ typedef struct _ADDR2_COMPUTE_CMASK_INFO_OUTPUT
         * - rb_aligned
         */
        struct gfx9_addr_meta_equation gfx9;
+
+       /* This is chip-specific, it requires 64KB_Z_X. */
+       UINT_16 *gfx10_bits; /* 68 2-byte elements */
     } equation;
 } ADDR2_COMPUTE_CMASK_INFO_OUTPUT;
 
diff --git a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
index f2c6d6b330f..14ce04d379c 100644
--- a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
+++ b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
@@ -369,6 +369,17 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeCmaskInfo(
 
         pOut->sliceSize  = pOut->metaBlkNumPerSlice * metaBlkSize;
         pOut->cmaskBytes = pOut->sliceSize * pIn->numSlices;
+
+        // Get the CMASK address equation (copied from CmaskAddrFromCoord)
+        const UINT_32  fmaskBpp      = GetFmaskBpp(1, 1);
+        const UINT_32  fmaskElemLog2 = Log2(fmaskBpp >> 3);
+        const UINT_32  index         = m_xmaskBaseIndex + fmaskElemLog2;
+        const UINT_8*  patIdxTable   =
+            (pIn->swizzleMode == ADDR_SW_VAR_Z_X) ? GFX10_CMASK_VAR_RBPLUS_PATIDX :
+            (m_settings.supportRbPlus ? GFX10_CMASK_64K_RBPLUS_PATIDX : GFX10_CMASK_64K_PATIDX);
+
+        ADDR_C_ASSERT(sizeof(GFX10_CMASK_SW_PATTERN[patIdxTable[index]]) == 68 * 2);
+        pOut->equation.gfx10_bits = (UINT_16*)GFX10_CMASK_SW_PATTERN[patIdxTable[index]];
     }
 
     return ret;