Mesa (main): microsoft/spirv_to_dxil: Enable support for shared memory

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Module: Mesa
Branch: main
Commit: f9f3713c84a464f897cda16845d33b9bca82e350
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9f3713c84a464f897cda16845d33b9bca82e350

Author: Enrico Galli <enrico.galli at intel.com>
Date:   Thu Aug  5 13:39:39 2021 -0700

microsoft/spirv_to_dxil: Enable support for shared memory

Reviewed-by: Jesse Natalie <jenatali at microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12228>

---

 src/microsoft/spirv_to_dxil/spirv_to_dxil.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/src/microsoft/spirv_to_dxil/spirv_to_dxil.c b/src/microsoft/spirv_to_dxil/spirv_to_dxil.c
index b7f43144386..cb836aab0d9 100644
--- a/src/microsoft/spirv_to_dxil/spirv_to_dxil.c
+++ b/src/microsoft/spirv_to_dxil/spirv_to_dxil.c
@@ -30,6 +30,17 @@
 
 #include "git_sha1.h"
 
+static void
+shared_var_info(const struct glsl_type* type, unsigned* size, unsigned* align)
+{
+   assert(glsl_type_is_vector_or_scalar(type));
+
+   uint32_t comp_size = glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
+   unsigned length = glsl_get_vector_elements(type);
+   *size = comp_size * length;
+   *align = comp_size;
+}
+
 bool
 spirv_to_dxil(const uint32_t *words, size_t word_count,
               struct dxil_spirv_specialization *specializations,
@@ -42,6 +53,8 @@ spirv_to_dxil(const uint32_t *words, size_t word_count,
    struct spirv_to_nir_options spirv_opts = {
       .ubo_addr_format = nir_address_format_32bit_index_offset,
       .ssbo_addr_format = nir_address_format_32bit_index_offset,
+      .shared_addr_format = nir_address_format_32bit_offset_as_64bit,
+
       // use_deref_buffer_array_length + nir_lower_explicit_io force
       //  get_ssbo_size to take in the return from load_vulkan_descriptor
       //  instead of vulkan_resource_index. This makes it much easier to
@@ -84,6 +97,13 @@ spirv_to_dxil(const uint32_t *words, size_t word_count,
    NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_ubo | nir_var_mem_ssbo,
               nir_address_format_32bit_index_offset);
 
+   if (!nir->info.shared_memory_explicit_layout) {
+      NIR_PASS_V(nir, nir_lower_vars_to_explicit_types, nir_var_mem_shared,
+                 shared_var_info);
+   }
+   NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_shared,
+      nir_address_format_32bit_offset_as_64bit);
+
    nir_variable_mode nir_var_function_temp =
       nir_var_shader_in | nir_var_shader_out;
    NIR_PASS_V(nir, nir_lower_variable_initializers,