Mesa (main): freedreno: Make chip_id 64b

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Module: Mesa
Branch: main
Commit: a1c4f11f4c148e6090ae552b27c6c4a65abdc48c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1c4f11f4c148e6090ae552b27c6c4a65abdc48c

Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Aug  5 15:36:05 2021 -0700

freedreno: Make chip_id 64b

In the UABI it is already 64b, but userspace ignored the upper 32b.  But
it looks like we will start needing the upper 32b.  So before we start
actually *using* chip_id, lets make sure everything is treating it as
64b.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>

---

 src/freedreno/drm/freedreno_drmif.h              | 4 ++--
 src/freedreno/drm/msm_pipe.c                     | 2 +-
 src/freedreno/drm/msm_priv.h                     | 2 +-
 src/gallium/drivers/freedreno/freedreno_screen.c | 2 +-
 src/gallium/drivers/freedreno/freedreno_screen.h | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/freedreno/drm/freedreno_drmif.h b/src/freedreno/drm/freedreno_drmif.h
index 118f6185912..67b784acbe9 100644
--- a/src/freedreno/drm/freedreno_drmif.h
+++ b/src/freedreno/drm/freedreno_drmif.h
@@ -52,9 +52,9 @@ enum fd_pipe_id {
 enum fd_param_id {
    FD_DEVICE_ID,
    FD_GMEM_SIZE,
-   FD_GMEM_BASE,
+   FD_GMEM_BASE,     /* 64b */
    FD_GPU_ID,
-   FD_CHIP_ID,
+   FD_CHIP_ID,       /* 64b */
    FD_MAX_FREQ,
    FD_TIMESTAMP,
    FD_NR_RINGS,      /* # of rings == # of distinct priority levels */
diff --git a/src/freedreno/drm/msm_pipe.c b/src/freedreno/drm/msm_pipe.c
index 12eab69f748..4fcd4c9d77d 100644
--- a/src/freedreno/drm/msm_pipe.c
+++ b/src/freedreno/drm/msm_pipe.c
@@ -250,7 +250,7 @@ msm_pipe_new(struct fd_device *dev, enum fd_pipe_id id, uint32_t prio)
 
    INFO_MSG("Pipe Info:");
    INFO_MSG(" GPU-id:          %d", msm_pipe->gpu_id);
-   INFO_MSG(" Chip-id:         0x%08x", msm_pipe->chip_id);
+   INFO_MSG(" Chip-id:         0x%016"PRIx64, msm_pipe->chip_id);
    INFO_MSG(" GMEM size:       0x%08x", msm_pipe->gmem);
 
    if (open_submitqueue(pipe, prio))
diff --git a/src/freedreno/drm/msm_priv.h b/src/freedreno/drm/msm_priv.h
index 54885c0f823..53e61e5896c 100644
--- a/src/freedreno/drm/msm_priv.h
+++ b/src/freedreno/drm/msm_priv.h
@@ -50,9 +50,9 @@ struct msm_pipe {
    struct fd_pipe base;
    uint32_t pipe;
    uint32_t gpu_id;
+   uint64_t chip_id;
    uint64_t gmem_base;
    uint32_t gmem;
-   uint32_t chip_id;
    uint32_t queue_id;
    struct slab_parent_pool ring_pool;
 
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 5b31c771750..0f3efc2010d 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -1022,7 +1022,7 @@ fd_screen_create(struct fd_device *dev, struct renderonly *ro,
 
    DBG("Pipe Info:");
    DBG(" GPU-id:          %s", fd_dev_name(screen->dev_id));
-   DBG(" Chip-id:         0x%08x", screen->chip_id);
+   DBG(" Chip-id:         0x%016"PRIx64, screen->chip_id);
    DBG(" GMEM size:       0x%08x", screen->gmemsize_bytes);
 
    const struct fd_dev_info *info = fd_dev_info(screen->dev_id);
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.h b/src/gallium/drivers/freedreno/freedreno_screen.h
index b3431a8f428..ca396e0c16e 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.h
+++ b/src/gallium/drivers/freedreno/freedreno_screen.h
@@ -84,7 +84,7 @@ struct fd_screen {
    const struct fd_dev_id *dev_id;
    uint8_t gen;      /* GPU (major) generation */
    uint32_t gpu_id;  /* 220, 305, etc */
-   uint32_t chip_id; /* coreid:8 majorrev:8 minorrev:8 patch:8 */
+   uint64_t chip_id; /* coreid:8 majorrev:8 minorrev:8 patch:8 */
    uint32_t max_freq;
    uint32_t ram_size;
    uint32_t max_rts; /* max # of render targets */