Mesa (main): intel/eu: Set scope to TILE for TGM flushes

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Module: Mesa
Branch: main
Commit: 11ac7d9e0254d7b6cf564df89867d6973830b6ff
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=11ac7d9e0254d7b6cf564df89867d6973830b6ff

Author: Jason Ekstrand <jason at jlekstrand.net>
Date:   Mon Aug  9 17:23:52 2021 -0500

intel/eu: Set scope to TILE for TGM flushes

Setting it to GPU can cause an L3$ flush in certain cases.  That's not
what we want as we really only care about coherency within the GPU.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Sagar Ghuge <sagar at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12291>

---

 src/intel/compiler/brw_eu_emit.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index e4f68b7196b..0fe8da3f10c 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -3251,7 +3251,7 @@ gfx12_set_memory_fence_message(struct brw_codegen *p,
    enum lsc_flush_type flush_type = LSC_FLUSH_TYPE_NONE;
 
    if (sfid == GFX12_SFID_TGM) {
-      scope = LSC_FENCE_GPU;
+      scope = LSC_FENCE_TILE;
       flush_type = LSC_FLUSH_TYPE_EVICT;
    }