Mesa (main): radv: determine if an image support comp-to-single at creation time

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Module: Mesa
Branch: main
Commit: dc58b0112f4b3dde2dce46fa8f59559d758da1a8
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc58b0112f4b3dde2dce46fa8f59559d758da1a8

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Aug 11 12:28:30 2021 +0200

radv: determine if an image support comp-to-single at creation time

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12323>

---

 src/amd/vulkan/radv_image.c           | 118 +++++++++++++++++-----------------
 src/amd/vulkan/radv_meta_clear.c      |   2 +-
 src/amd/vulkan/radv_meta_fast_clear.c |   2 +-
 src/amd/vulkan/radv_private.h         |   3 +-
 4 files changed, 63 insertions(+), 62 deletions(-)

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 45ed9b7ed22..9a885afeb11 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1377,6 +1377,64 @@ radv_image_is_l2_coherent(const struct radv_device *device, const struct radv_im
    return false;
 }
 
+/**
+ * Determine if the given image can be fast cleared.
+ */
+static bool
+radv_image_can_fast_clear(const struct radv_device *device, const struct radv_image *image)
+{
+   if (device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)
+      return false;
+
+   if (vk_format_is_color(image->vk_format)) {
+      if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image))
+         return false;
+
+      /* RB+ doesn't work with CMASK fast clear on Stoney. */
+      if (!radv_image_has_dcc(image) && device->physical_device->rad_info.family == CHIP_STONEY)
+         return false;
+   } else {
+      if (!radv_image_has_htile(image))
+         return false;
+   }
+
+   /* Do not fast clears 3D images. */
+   if (image->type == VK_IMAGE_TYPE_3D)
+      return false;
+
+   return true;
+}
+
+/**
+ * Determine if the given image can be fast cleared using comp-to-single.
+ */
+static bool
+radv_image_use_comp_to_single(const struct radv_device *device, const struct radv_image *image)
+{
+   /* comp-to-single is only available for GFX10+. */
+   if (device->physical_device->rad_info.chip_class < GFX10)
+      return false;
+
+   /* If the image can't be fast cleared, comp-to-single can't be used. */
+   if (!radv_image_can_fast_clear(device, image))
+      return false;
+
+   /* If the image doesn't have DCC, it can't be fast cleared using comp-to-single */
+   if (!radv_image_has_dcc(image))
+      return false;
+
+   /* TODO: DCC fast clears with MSAA aren't fully supported. */
+   if (image->info.samples > 1)
+      return false;
+
+   /* It seems 8bpp and 16bpp require RB+ to work. */
+   unsigned bytes_per_pixel = vk_format_get_blocksize(image->vk_format);
+   if (bytes_per_pixel <= 2 && !device->physical_device->rad_info.rbplus_allowed)
+      return false;
+
+   return true;
+}
+
 static void
 radv_image_reset_layout(struct radv_image *image)
 {
@@ -1495,6 +1553,8 @@ radv_image_create_layout(struct radv_device *device, struct radv_image_create_in
 
    image->l2_coherent = radv_image_is_l2_coherent(device, image);
 
+   image->support_comp_to_single = radv_image_use_comp_to_single(device, image);
+
    radv_image_alloc_values(device, image);
 
    assert(image->planes[0].surface.surf_size);
@@ -1542,64 +1602,6 @@ radv_image_print_info(struct radv_device *device, struct radv_image *image)
    }
 }
 
-/**
- * Determine if the given image can be fast cleared.
- */
-static bool
-radv_image_can_fast_clear(const struct radv_device *device, const struct radv_image *image)
-{
-   if (device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)
-      return false;
-
-   if (vk_format_is_color(image->vk_format)) {
-      if (!radv_image_has_cmask(image) && !radv_image_has_dcc(image))
-         return false;
-
-      /* RB+ doesn't work with CMASK fast clear on Stoney. */
-      if (!radv_image_has_dcc(image) && device->physical_device->rad_info.family == CHIP_STONEY)
-         return false;
-   } else {
-      if (!radv_image_has_htile(image))
-         return false;
-   }
-
-   /* Do not fast clears 3D images. */
-   if (image->type == VK_IMAGE_TYPE_3D)
-      return false;
-
-   return true;
-}
-
-/**
- * Determine if the given image can be fast cleared using comp-to-single.
- */
-bool
-radv_image_use_comp_to_single(const struct radv_device *device, const struct radv_image *image)
-{
-   /* comp-to-single is only available for GFX10+. */
-   if (device->physical_device->rad_info.chip_class < GFX10)
-      return false;
-
-   /* If the image can't be fast cleared, comp-to-single can't be used. */
-   if (!radv_image_can_fast_clear(device, image))
-      return false;
-
-   /* If the image doesn't have DCC, it can't be fast cleared using comp-to-single */
-   if (!radv_image_has_dcc(image))
-      return false;
-
-   /* TODO: DCC fast clears with MSAA aren't fully supported. */
-   if (image->info.samples > 1)
-      return false;
-
-   /* It seems 8bpp and 16bpp require RB+ to work. */
-   unsigned bytes_per_pixel = vk_format_get_blocksize(image->vk_format);
-   if (bytes_per_pixel <= 2 && !device->physical_device->rad_info.rbplus_allowed)
-      return false;
-
-   return true;
-}
-
 static uint64_t
 radv_select_modifier(const struct radv_device *dev, VkFormat format,
                      const struct VkImageDrmFormatModifierListCreateInfoEXT *mod_list)
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 0e783101270..fdb1a9f900a 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1702,7 +1702,7 @@ vi_get_fast_clear_parameters(struct radv_device *device, const struct radv_image
    bool has_alpha = false;
 
    /* comp-to-single allows to perform DCC fast clears without requiring a FCE. */
-   if (radv_image_use_comp_to_single(device, iview->image)) {
+   if (iview->image->support_comp_to_single) {
       *reset_value = RADV_DCC_CLEAR_SINGLE;
       *can_avoid_fast_clear_elim = true;
    } else {
diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c
index 51024e666ae..28e8a6a2aac 100644
--- a/src/amd/vulkan/radv_meta_fast_clear.c
+++ b/src/amd/vulkan/radv_meta_fast_clear.c
@@ -793,7 +793,7 @@ radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer, struct r
       radv_fmask_decompress(cmd_buffer, image, subresourceRange);
    } else {
       /* Skip fast clear eliminate for images that support comp-to-single fast clears. */
-      if (radv_image_use_comp_to_single(cmd_buffer->device, image))
+      if (image->support_comp_to_single)
          return;
 
       radv_fast_clear_eliminate(cmd_buffer, image, subresourceRange);
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 3d20e23d388..970b9907ddb 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1586,8 +1586,6 @@ bool radv_image_use_dcc_image_stores(const struct radv_device *device,
                                      const struct radv_image *image);
 bool radv_image_use_dcc_predication(const struct radv_device *device,
                                     const struct radv_image *image);
-bool radv_image_use_comp_to_single(const struct radv_device *device,
-                                   const struct radv_image *image);
 
 void radv_update_fce_metadata(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image,
                               const VkImageSubresourceRange *range, bool value);
@@ -1902,6 +1900,7 @@ struct radv_image {
    bool shareable;
    bool l2_coherent;
    bool dcc_sign_reinterpret;
+   bool support_comp_to_single;
 
    /* Set when bound */
    struct radeon_winsys_bo *bo;