Mesa (main): freedreno/ir3: Apply the a6xx samgq workaround to TES/TCS/GS as well.

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Thu Aug 19 21:42:42 UTC 2021


Module: Mesa
Branch: main
Commit: 5d192c2036daf043e804c1e5896e13b4b6e31d6c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d192c2036daf043e804c1e5896e13b4b6e31d6c

Author: Emma Anholt <emma at anholt.net>
Date:   Wed Aug 18 12:34:01 2021 -0700

freedreno/ir3: Apply the a6xx samgq workaround to TES/TCS/GS as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12454>

---

 src/freedreno/ci/deqp-freedreno-a630-fails.txt | 2 --
 src/freedreno/ir3/ir3_legalize.c               | 5 +++--
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/freedreno/ci/deqp-freedreno-a630-fails.txt b/src/freedreno/ci/deqp-freedreno-a630-fails.txt
index f8359211418..a57f02abd42 100644
--- a/src/freedreno/ci/deqp-freedreno-a630-fails.txt
+++ b/src/freedreno/ci/deqp-freedreno-a630-fails.txt
@@ -53,8 +53,6 @@ KHR-GLES31.core.tessellation_shader.tessellation_shader_tc_barriers.barrier_guar
 
 # no debug info in the qpa
 KHR-GLES31.core.texture_cube_map_array.color_depth_attachments,Fail
-# failures in GS,TCS,TES texturing
-KHR-GLES31.core.texture_cube_map_array.sampling,Fail
 
 # rendering errors in ~4x4 blocks around the bottom side of the diagonal for the quad
 bypass-dEQP-GLES31.functional.blend_equation_advanced.msaa.colorburn,Fail
diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c
index b2d8ab2a3a2..fab568a7343 100644
--- a/src/freedreno/ir3/ir3_legalize.c
+++ b/src/freedreno/ir3/ir3_legalize.c
@@ -234,8 +234,9 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
       if (list_is_empty(&block->instr_list) && (opc_cat(n->opc) >= 5))
          ir3_NOP(block);
 
-      if (ctx->compiler->samgq_workaround && ctx->type == MESA_SHADER_VERTEX &&
-          n->opc == OPC_SAMGQ) {
+      if (ctx->compiler->samgq_workaround &&
+          ctx->type != MESA_SHADER_FRAGMENT &&
+          ctx->type != MESA_SHADER_COMPUTE && n->opc == OPC_SAMGQ) {
          struct ir3_instruction *samgp;
 
          list_delinit(&n->node);



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